Microelectronics, Microsystems and Nanotechnology

The following sections are included:

• FOREWORD

• CONTENTS

We show in this paper the principle and the application of a new approach to the fabrication of oligonucleotide probe arrays on a silicon substrate structured with microwells. This new strategy uses a principle of selective protection by a polymer for in situ oligonuceotides synthesis. The polymer is deposited on chosen microwells before one of the four steps of the DNA synthesis based on phosphoramidite chemistry.

The process combines an automatic synthesizer with a micro drop dispenser for spatially localized deposition of the protective polymer. A great choice of polymer/solvent couples allows the integration of the process in the synthesis cycle of an automated synthesizer.

The preliminary results for the growing of oligonucleotides (20 nucleotides in length) in a multi step fashion are described and discussed. Coupling efficiencies, synthesis yield and obtained sequence purity, show the possibility of protective polymer strategy for the in situ synthesis DNA chip fabrication.

Compositionally modulated structures consisting of FM La_1-xCa_xMnO₃ layers (x = 0.33, 0.4, 0.48) and La_1-yCa_yMnO₃ antiferromagnetic (AF) layers (y = 0.52, 0.67, 0.75) were grown on (001)LaAlO₃ by pulsed laser deposition. The effect of interfacial Ca composition on the magneto-transport properties of FM/AF multilayers is examined between 4.2 and 300 K.

We present a novel method for the calculation of the local electric field at the emitting surface of a carbon nanotube. The nanotube is simulated by a cylindrical array of touching spheres, each sphere representing an atom of the tube. The electrostatic potential is then a linear combination of the potentials produced by each sphere. We calculate the local electric fields and the corresponding enhancement factors of both open and closed nanotubes. From the comparison we give a possible explanation as to why in some experiments the closed nanotubes emit more current than the open ones while in other experiments the opposite holds true.

We present a systematic theoretical study of the photoluminescence and micro-photoluminescence spectra of an Al_0.3Ga_0.7As/GaAs V-shaped quantum wire. The model used reproduces the observed characteristics based on the existence of microscopic compositional fluctuations at the interfaces.

Catalytic action of Ni atoms in the growth of single-wall carbon nanotubes is investigated using tight-binding molecular dynamics and ab-initio methods. Our results demonstrate this to be a two step process in which the Ni atom first creates and stabilizes defects in nanotubes. The subsequent incorporation of incoming carbon atoms anneals the Ni-stabilized defects freeing the Ni atom to repeat the catalytic process.

Very-low energy (1 keV) Si implantation and subsequent thermal annealing are used for the fabrication of a narrow charge storage layer within the gate oxide of metal-oxide-semiconductor capacitors and transistors. Capacitance and channel current measurements are performed to investigate the charging effects of the Si-implanted oxides as a function of Si fluence. Clear memory characteristics are observed for a dose of 1 × 10¹⁶ cm^-2 or lower. The device electrical characteristics are found compatible with the spatial arrangement and structural state of implanted Si as well as with the presence of interface states and traps that originate from the nanocrystal formation process.

A kinetic model of carrier transport via traps in dielectric has been developed for quantum well Si/CaF₂ structures. Relay tunneling via traps and thermoelectron emission from the traps have been considered as possible mechanisms of the carrier transfer in the dielectric. Charge accumulation, its polarization and relaxation under external applied bias are found to result in the shift of current origin and appearance of the negative differential resistance region on the current-voltage characteristics of the structures. The effects of temperature, measurement regimes and structure geometry have been as well analyzed.

In this work we have investigated radiative recombination from silicon quantum dots in Si/SiO₂ multiquantum wells fabricated by successive cycles of silicon deposition by Low Pressure Chemical Vapor Deposition and oxidation. The variation of PL and EL peak intensity and peak wavelength with nc-Si layer thickness, applied electric field and temperature was studied. PL appeared for silicon layer thickness smaller than 5-6 nm. EL exhibited a reversible blueshift with voltage, indicating voltage-controlled tunability of the peak wavelength. The effect of the applied electric field on the radiative recombination lifetime in silicon quantum dots embedded in SiO₂ was investigated theoretically.

Recent progress in the development of integrated optoelectronic units including porous Si light emitting diode connected with a photodetector by an alumina waveguide is reported. Main attention has been devoted to the enhancement of the light emitting diode parameters. The value of quantum efficiency has been estimated to be 0.19 %. The data obtained from the transient electroluminescent wave form gave the delay time of 1.2 ns and the rise time of 1.5 ns for developed diodes. Possible methods of further device optimization are discussed.

The energy subbands in pseudomorphic p-type Si/Si_1-xGe_x/Si quantum wells are calculated within the multiband effective-mass approximation that describes the heavy, light and split-off hole valence bands. We examine the infrared intersubband absorption in this system. The selection rules are obtained for light polarization vector parallel or perpendicular to the growth direction. Comparison is made with other theories and experiment.

The diffusion and the phonon-drag thermopower are calculated for a two-dimensional electron and hole gas at low temperatures in the Fractional Quantum Hall Effect (FQHE) regime at filling factors v = 3/2 and v = 1/2. The composite fermions (CFs) picture enables us to use the Integer Quantum Hall Effect (IQHE) and Shubnikov de Haas (SdH) conductivity models for a quantitative comparison with experiment. We use the edge states model to calculate the thermopower of the system. We use the idea of parallel conduction of two gases. One gas, composed of electrons (holes) fully occupies one of the two spin levels of the lowest Landau level, and a second composed of composite fermions partially occupies the other spin level. Comparison is given with experiment.

We explain thermopower measurements at a half filled Landau level in GaAs/AlGaAs structures. The phonon-drag thermopower, S^g, dominates in the whole temperature range we examine here. We describe S^g by using the standard Cantrell-Butcher theory for S^g at zero magnetic field within the composite fermion framework.

A design and a solid state fabrication scheme are proposed for the production of supported-metal catalysts micrometer-long and nanometer-wide. Ni catalysts supported on SiO₂ have been fabricated according to the proposed scheme. The catalytic testing of the model Ni/SiO₂ system revealed that it can reproduce the behavior of traditional Ni on silica clusters. Thus, the model system is an adequate catalyst and the proposed scheme is appropriate for the manufacturing of supported-metal catalysts.

We discuss the dependence of the calculated spontaneous emission rates of Si rectangular quantum wires grown in {100} plane on the growth direction. The eigenstates of electrons and holes are calculated within the effective mass approximation. The directional dependence of the electron states is reflected on the spontaneous emission of the quantum wires. It becomes obvious that light emission from quantum wires of diameters of a few nanometers has strong direct transition character, if the wires direction is along one of the main crystallographic directions or along [110]. Phonon assisted transitions are in these cases also present, but their intensity is three orders of magnitude smaller than the intensity of direct transitions.

In this work we have characterized diode structures containing a single nc-Si layer between SiO₂ layers and modeled their electrical behavior as a double RC circuit. The free carrier concentrations and the current-voltage characteristics of Si/SiO₂ superlattices were numerically computed as a function of parameters such as the number of Si wells, the Si and SiO₂ film thicknesses and the temperature.

The structure and electrical characteristics of low-energy Ge-implanted SiO₂ thin layers are investigated. Glass transition and Ge-species relocation lead to an arrest of phase separation in the annealed oxide, which, nevertheless, can phase separate following e-irradiation during transmission electron microscopy observation. The electrical characteristics of the oxide layers annealed at different temperatures are studied through high-frequency capacitance-voltage measurements of metal-oxide-semiconductor capacitors before and after the application of constant voltage stress. Measurements indicate that Ge-implanted-SiO₂ undergoes a major structural change after annealing at temperatures > 910°C. The latter change is identified as a relocation of Ge towards the upper portion of the oxide with a significant fraction of them leaving the oxide.

An investigation of the electrical transport properties of Si/CaF₂ multi-layers is presented. These multi-layers were synthesized by MBE at room temperature. The current-voltage and current temperature characteristics showed that the conduction mechanism was thermally activated. In particular structures having CaF₂ thickness in each bilayer larger than 1nm showed the presence of a continuous distribution of defects with activation energies within the range of 0.3-0.8eV. On the other hand MLs with smaller CaF₂ thickness are characterised by a constant activation energy of 0.3eV. In those latter structures the dominant transport mechanism follows the Poole-Frenkel model.

The photoluminescence and electroluminescence characteristics of nanocrystalline silicon in Si/CaF₂ superlattices synthesized by Molecular Beam Epitaxy on Si (111) substrates at room temperature were investigated. Light emission from these structures was in the visible range and the spectra were broad. Simple light emitting devices were fabricated with semitransparent gold or ITO as gate metal and an aluminium back ohmic contact, so as to get current in the vertical direction. Photo- and electroluminescence peaks were at the same wavelength. Voltage–tunable electroluminescence in the red, similar to that obtained in porous silicon and Si/SiO₂ superlattices was observed. The observed blue shift by increasing the applied voltage was limited to ≈650-700nm, suggesting that some states within the gap were involved in radiative recombination from the silicon crystallites. The spatial distribution of the emitted light from the device area was also investigated.

We have calculated the optical gap of small silicon nanocrystals, passivated by hydrogen, with diameters up to 12 Å, using the high level Configuration Interaction Singlets (CIS) method based on both Hartree-Fock (HF) and density functional theory (DFT). The hybrid nonlocal exchange-correlation functional of Becke and Lee, Yang and Parr, including partially exact exchange (B3LYP) was used throughout the calculations.

Our results, which can be rather safely extrapolated for larger nanoparticles with diameters up to about 16 Å, clearly show that for nanocrystals of this size, quantum confinement by itself cannot explain the observed visible photoluminescence since the calculated optical gap is definitely larger than 3.0 eV.

Thus, additional factors, such as the presence of oxygen in the surface of the samples, must play a significant role. This is in agreement with other theoretical calculations, and our own preliminary work for oxygen covered nanocrystals.

We have calculated the electronic structure of small Si dots terminated by hydrogen atoms with diameters up to 15Å. Having in mind the extention, in the future, of the present calculations to larger dots we have used a variety of theoretical techniques ranging from semi-empirical to ab initio Hartree – Fock (HF) and density functional theory (DFT). Within the framework of the DFT theory, we have utilized the hybrid (HF+DFT) non-local exchange and correlation functional of Becke, Lee, Young and Parr (B3LYP), which is known to be very successful for silicon and other semiconductor clusters. The calculated band gaps are significantly larger than those suggested by recent experiments design to measure ground state band edges. We suggest that the DFT/B3LYP description is the most accurate of the methods, despite the fact that the calculated band gaps by simple LDA method, without non local corrections, and by empirical methods fitted to bulk properties are artificially closer to the values suggested by experiment. The discrepancy between experimental and theoretical values is open to various interpretations.

The ultimate downsizing of the minimum feature size is hampered by physical, technological and economical limitations. To ensure Moore's law below 100 nm technology nodes both front- and back-end processing has to face technological challenges as clearly stipulated by the International Technology Roadmap for Semiconductors (ITRS). Lithography, gate stack, shallow junctions, high- and low-k dielectrics and interconnect schemes are nowadays amongst the hot research issues leading to a global collaboration. This paper reviews some of the on-going research efforts to come to cost-effective solutions forming the backbone for future technology generations.

New photolithographic resists are being developed for use in biomolecule patterning. These resists fulfill biocompatible lithographic requirements necessary for the implementation of lift-off process for this purpose. t-Butyl acrylate homopolymer and a new synthesized copolymer having t-butyl ester groups were used in the resist formulations. The resists were chemically amplified, positive tone and had onium salts as photoacid generators. The method is general, independent of the specific type of biomolecules and it was applied on both planar and cylindrical plastic surfaces.

In this work we investigated the use of SiO₂ dielectrics deposited by LPCVD using TEOS under various deposition temperatures and pressures as gate oxides in thin film transistors (TFTs). It was found, using FTIR spectroscopy, that at temperatures lower than 635°C carbon contamination is introduced in the oxide. The degradation of the TFT transfer characteristics under various stressing gate bias values was studied. The evolution of the electrical parameters with stressing time was determined. The degradation of both the threshold voltage and the subthreshold swing exhibits logarithmic dependence with stressing time, indicating a charge trapping process mainly occurring near and at the polysilicon/SiO₂ interface.

Two selected examples of interface studies relevant to microelectronis, using X-ray and Ultra-violet photoelectron spectroscopies (XPS,UPS) and Work Function (WF) measurements are presented. The study of the early stages of growth of the Cu/6H-SiC(0001) interface under ultra-high vacuum (UHV) conditions at RT and its behavior upon annealing up to 900K showed that the Cu film grows in a layerwise fashion and exhibits a thermally stable Schottky barrier height of about 0.6 eV. Thin layered films of the OOCT-OPV5 oligomer were grown on Au in UHV and their valence band structure, work function and band bending were determined, from which the band lineup at the interface was obtained.

In this work we use dislocation loops and boron - doped δ-layers to monitor the interstitial injection during common and nitrous oxidation of silicon at low temperatures (850–950 °C). The interstitials captured by the loops are measured using Transmission Electron Microscopy. The number of Si atoms released after oxynitridation was calculated from the difference between the total number of atoms stored in the loops for oxidizing and inert ambient. We found that this number is larger compared with the same dry oxygen oxidation conditions. This result is also confirmed by measuring the diffusivity enhancement of boron δ-layers during oxidation under both ambients.

Ultra shallow n⁺p junction formation by lamp based rapid thermal annealing of As implanted Si has been investigated. The effect of different heating rates, i.e. 70, 160 and 200°C/s, on electrical activation, sheet resistance, junction depth and leakage current has been studied. The results obtained have shown that RTA at a high temperature of 1050°C for 10sec, using a high heating rate of 200°C/s, leads to the formation of shallow n⁺p junctions with low sheet resistance and leakage current, as well as to complete activation of the implanted As.

The aim of this work is to obtain a better understanding of the roughness formation in a lithographic process. To this end, a molecular type simulator of surface and line-edge (SR and LER) roughness for the lithography of a negative-tone chemically amplified epoxy resist is first briefly described. Then the problem of the quantitative characterization of the roughness is addressed. Two parameters, the root-mean square deviation (rms) and the fractal dimension D_f, are computed after each process step for different exposure doses and concentrations of the photoacid generator (PAG). It is found that for constant PAG content, the rms of both SR and LER shows a maximum at low doses, whereas the D_f is reduced as the exposure dose decreases. At high doses, the increase in PAG content is followed by a slight increase in D_f and a decrease in rms. Furthermore, it is shown that in all cases the development process reduces the D_f and increases the rms roughness. Hence, these roughness parameters seem to be not so irrelevant since changes in material properties and process conditions have opposite effects on them. Finally, a first comparison of the simulation results with experimental data is presented.

F₂ laser (157 nm) lithographic materials and processes are examined. Modified acrylic copolymers with tailored etch resistance enhancement are employed as both negative tone and positive tone single layer resists, while siloxanes are used for bilayer schemes. VUV absorbance spectra are studied for film thickness optimization. First results from preliminary exposures at the Exitech Ltd 157 nm prototype microstepper are presented. Aqueous base developed negative resist (ADNR) and pure poly dimethyl siloxane (PDMS) show high resolution potential.

Copper features with dimensions down to 0.5 µm were fabricated on silicon substrates by selective chemical vapor deposition. For the fabrication oxidized (100) silicon substrates were used, covered with a film grown by LPCVD at 0.1 Torr and 550 °C, from W(CO)₆ decomposition. These substrates were subsequently covered with AZ 5214™ photosensitive polymer, which has been developed as both positive and negative tone resist. Copper was then chemically vapor deposited on the patterned substrates by 1, 5-cyclooctadiene Cu(I) hexafluoroacetylacetonate decomposition, at 1 Torr and temperatures of 110 and 140 °C. A vertical, cold-wall reactor was used, equipped with a UV lamp permitting photon-assisted deposition. Under UV illumination, copper was deposited on resist covered and uncovered parts of the substrate. In absence of illumination, the metal was selectively grown on the tungsten film only at relatively slow rates (1 and 3.5 nm/min at 110 and 140 °C respectively). Copper films had a granular form with a grain size increasing with temperature (150 and 550 nm at 110 and 140°C respectively). After depositions the resist was removed in an oxygen plasma leading to the formation of fine copper features.

The purpose of this study is to investigate the exact mechanism of the nitridation of c-plane Al₂O₃ and the role of this treatment in the properties of GaN epitaxial layers grown by radio frequency plasma assisted molecular beam epitaxy. Different nitridation conditions were used with high and low substrate temperatures and nitridated samples were studied by reflected high energy electron diffraction (RHEED), Auger electron spectroscopy (AES), and atomic force microscopy (AFM). The sapphire nitridation temperature was found to control the polarity of GaN epitaxial layers grown on a GaN nucleation layer. High temperature resulted to strong nitridation effect and Ga-face material, while low temperature resulted to weak nitridation and N-face GaN. However, Ga-face material was also grown when an AlN nucleation layer was used on substrate nitridated at low temperature. Finally AlGaN/GaN HFET devices were realized on Ga-face structures completely grown by MBE, using an AlN nucleation layer on a low temperature nitridated Al₂O₃.

A surface model for open area etching of Si and SiO₂ is coupled with a model to calculate the local values of etching rate on each elementary surface of the structure being etched. Ion energy and composition, and the ratios –R- of neutral to ion flux (Fluorine atoms or carbon containing radicals) are used as independent variables, while local etching yields and rates are the dependent variables. The local etching model (essentially a local flux calculation model) includes shadowing effects of ions/neutrals and reemission, while charging effects are simulated only by an increased ion angular spread. Aspect ratio dependent (ARDE) and independent (ARIE) etching as well as transition from etching to deposition are predicted and studied as a function of plasma phase composition.

We study for the first time the epitaxial growth of ErSi₂ on strained and relaxed Si_1-xGe_x substrates, as well as its structural properties. Epitaxy of ErSi₂ is achieved at a temperature of 550°C after the reaction of a very thin Er/Si template layer. ErSi₂ grows in the tetragonal phase, which has been previously observed for epitaxial growth on Si at higher temperatures. ErSi₂ layers grown on relaxed Si_1-xGe_x exhibit a higher crystal quality, due to the reduction of the lattice mismatch with increasing Ge content.

An electron beam lithography simulator for low energy beam is developed and presented in this paper. The elastic scattering cross section is evaluated using the Partial Wave Expansion Method (PWEM). The cross section is evaluated by a numerical approach and introduced into the main Monte-Carlo program as a look-up table in order to reduce simulation time. The results are compared to the Born approximation in the case of PMMA and a polyoxometalate resist. The Point spread function (PSF) is evaluated by the Monte Carlo simulation technique and introduced intro the SELID simulator in order to obtain the final developed profiles. A study of the energy deposition versus depth is also carried out. It is deduced that the PWEM is necessary for energies below 500eV and high-Z substrates.

In this paper, a review of the electrical properties and the performance of SOI MOSFETs realized with various device architectures (single gate, double gate with volume inversion, ultra-thin film, ground plane, DTMOS, etc.) is given. The subthreshold operation and the special SOI electrical and thermal floating body effects are addressed. The short channel and hot carrier effects are studied for gate lengths down to deep sub-0.1µm. The impact of the SOI material and the transistor architecture on device reliability is also outlined.

The structural and electrical properties of excimer laser annealed polycrystalline silicon thin film transistors (polysilicon TFTs) are investigated in relation to the laser energy density. The TFT performance parameters are correlated with the structural properties of the polysilicon films and their electrically active defects, the basic variable being the laser energy density. Simple offset gated TFTs are investigated in relation to the intrinsic offset length and the polysilicon quality. It is demonstrated that the leakage current is completely suppressed without sacrificing the on-current when the polysilicon is of high quality and the offset length is 2 µm. Hot-carrier experiments indicate that the position of the grain boundaries in the channel with respect to the drain end may lead to a different behavior of the device degradation.

The approach of direct growth of GaN on vicinal (001) GaAs substrates, by RF-plasma source molecular beam epitaxy, has been investigated. It has been found possible to grow GaN thin films with several different kinds of crystal structure: polycrystalline hexagonal, single-crystalline hexagonal with (0001) or (-1012) orientation and single-crystalline cubic with epitaxial relationship to the GaAs substrate. The GaN crystal structure was controlled by the GaAs surface nitridation, the annealing of an initial low temperature GaN buffer layer and the N/Ga flux ratio conditions. It was also found that cubic or inclined C-axis hexagonal (-1012) crystals could overgrow on initial polycrystalline or mixed phase GaN buffer layers.

Yttria (Y₂O₃) thin films were grown directly on Si (001) substrates by e-beam evaporation in an MBE chamber under UHV conditions. Based on x-ray diffraction data, it can be inferred that Y₂O₃ epilayers of high crystalline quality can be obtained at an optimum growth temperature ~450°C. At this temperature the heteroepitaxial relationship is Y₂O₃(110)//Si(001) favoring the formation of potentially harmful complex microstructure, as can be seen by HRTEM. Although theory predicts a good thermodynamic stability for Y₂O₃ on Si, these materials react. At moderate growth temperature ~610 °C a YSi₂ phase appears. In addition, a non-uniform interfacial layer with thickness ranging between 5 to 15 Å is observed.

In this work, we determined experimentally the effects of the number of quantum wells (QWs) on the parameters of laser diodes. Separate confinement heterostructures (SCH) with 2, 4 and 8 QWs and graded index-SCH structures with 2, 4, 8 and 16 QWs were investigated. The influence of the number of QWs on the threshold current density and differential quantum efficiency of the lasers was studied.

The microhardness value and surface microcrack propagation pattern of hexagonal and cubic GaN polytypes, grown with different deposition techniques, is studied. The implantation induced surface hardening is examined in the hexagonal symmetry films. The implantation species were N⁺ and O⁺. Additionally, the microhardness anisotropy with respect to the film's main crystallographic directions is revealed. Finally, the indentation induced surface microcrack initiation is studied. In the case of the cubic polytypes, the anisotropic surface microcrack propagation is monitored and correlated with the crystallographic directions. Additionally, the film's microhardness value is measured and deconvoluted from that of the Si substrate. The microhardness values and the microcrack propagation patterns between the two polytypes are compared.

GaAs/AlGaAs Multiple Quantum Well (MQW) solar cells, with different ratios of well to barrier number and thickness, have been examined with temperature, between -175C and 148C, and under AM1.5 illumination and 5x concentration conditions. The ideality factor of the diodes in the dark improved with temperature. The fabrication of 1 cm × 1 cm MQW solar cells with different AlGaAs barrier thicknesses and illumination under 1.5 AM1 conditions showed that there is an improvement in the performance of the device as the thickness of the barrier layer is reduced. 1 cm × 1 cm MQW solar cell with the optimum QW geometry (number of wells and barriers thickness) exhibited J_sc = 56.8mA/cm² and V_oc = 1.041V at 5x concentration when compared to J_sc = 10.2mA/cm² and V_oc = 1.009V at AM1.5 illumination conditions.

Reactive Ion Etching (RIE) with laser interferometry has been demonstrated as a simple technology for the fabrication of GaAs devices bonded on Si C-MOS wafers for optical interconnect applications. Laser interferometry as end point control was used during the processing of the GaAs-based laser and photodetector optoelectronic devices. An optimized BCl₃ RIE process was developed for the fabrication of smooth and vertical facets for the formation of laser mirrors. The isolation of the individual GaAs optoelectronic devices was achieved in a mixture of BCl₃ and Cl₂ gases without affecting the bonding material.

GaN films were grown on Si (111) substrates by nitrogen rf plasma source molecular beam epitaxy. Reflection high energy electron diffraction (RHEED), atomic force microscopy, transmission electron microscopy, infrared transmittance and photoluminescence results, characterize the properties of GaN films grown under different in-situ substrate preparation and growth initiation methods. Very smooth surfaces, exhibiting surface reconstruction in RHEED, were achieved by using an AlN buffer layer. However, these films produced weak photoluminescence, compared to that of the GaN layers directly deposited on a reconstructed 7 × 7 Si(111) surface.

The marerial properties of GaN films grown on Al₂O₃ (0001) substrate nitridated at high and low temperatures were investigated. The effects of GaN or AlN nucleation layers and different III/V flux ratio on the polarity of the films were also investigated Reflected high energy electron diffraction (RHEED) was used for in-situ monitoring of the surface structure and films polarity. The optoelectronic properties were determined by low and room temperature photoluminescence measurements. Finally a method combining etching in a KOH solution and atomic force microscopy (AFM) was developed to indentify the polarity of the GaN films.

In this work we investigate the influence of controlled damage generated by Si⁺ implantation in the S/D region on the extent of the Reverse Short Channel Effect (RSCE) of NMOS devices. The implantation that is performed prior to S/D formation is followed by either RTA or furnace annealing using different ramp rates. The influence of the ramp rates on the RSCE is then studied. The experimental data are analysed using combined process and device simulations by taking into account the dissolution kinetics of {113} defects.

The shrinkage of the MOSFET device dimensions along with the relatively wide gate electrode devices needed to accommodate RF applications lead to reconsideration of the noise properties of submicron MOSFET's. In this paper we present the noise properties associated with interconnect resistors of an interdigitated structure and the resulting noise source (strong function of the number of fingers) is evaluated against the other noise sources present in the device such as channel thermal noise, induced gate noise and resistive gate voltage noise. Short channel effects have been taken into account for the evaluation of these noise sources and two-port analysis performed in order to calculate minimum noise figure and optimum input resistance for noise matching.

0.15µm gate length MOSFETs on Low Dose (LD) SIMOX substrates were stressed by hot-carriers under "off-state" operation conditions. Subthreshold device characteristics were studied. It was found that the lower the effective doping of the Si film the higher the device lifetime. The subthreshold swing and ΔC_it/C_it, are used to monitor the ageing of the devices. Under hot-electron stressing, these exhibited logarithmic time dependence due to the quick saturation of the defects. Back-channel characteristics were affected by a parallel conduction in the subthreshold region, originated probably by the "edge transistor". After hot-hole stressing this conduction is eliminated.

Metal-Oxide-Semiconductor (MOS) dosimeters in a stacked configuration have been already used to increase their sensitivity to radiation. In this work, a new bias technique is presented, allowing stacking a higher number of MOS dosimeters resulting in a dosimetric system with higher sensitivity in a large range of doses. The proposed low voltage technique consists in the biasing of each MOS dosimeter of the chain at the limits of the saturation region. So the output voltage of the stacked MOS dosimeters may take a lower value comparing with the classical stacked configuration allowing a greater number of stacked dosimeters. This configuration is aimed to be used for low dose personal dosimetry.

In this paper a novel voltage-mode MOS circuit is presented, which calculates the Euclidean norm of an input vector of unipolar voltages. It is based on a very simple structure, utilizing a one-transistor cell. Therefore, it is easily expandable to multiple inputs and very fast, exhibiting high linearity and precision. These characteristics were confirmed by simulations and experimental results with commercial transistor arrays (CD4007).

The fabrication and characterization of a membrane type piezoresistive pressure sensor with piezoresistors consisting of 3C-SiC with maximum temperature ~ 400°C, is presented. The sensitivity at RT is S = 0.5mV/V bar. The membrane of the device was defined by etching of a UNIBOND SOI wafer. The technological problems related with the realization of SiC/SOI pressure sensors are discussed.

This paper presents the manufacturing of micromachined filters for 38 and 77 GHz having as support a 2.2 µm thin GaAs/AlGaAs membrane. The membranes were manufactured using selective dry etching techniques with AlGaAs as the etch-stop layer. On wafer measurements of the filter structures were performed. Losses less than 1.5 dB at 38 GHz and less than 2 dB at 77 GHz have been obtained.

Despite their potential properties, fluxgate sensors present serious difficulties when miniaturizing is attempted, preventing them from being used in applications, like magnetic anomaly scanning where utilization of sensor arrays is required. In this work an alternative signal extraction technique is being analytically examined for its ability to be utilized in miniature fluxgates. The application of this technique makes sensor response less sensitive in core cross-section and in inferior characteristics of integrated planar coils. A fluxgate sensor with sensitivity as higher as four decades compared with conventional micro-systems is presented.

An integrated thermal CMOS compatible gas flow sensor was designed, fabricated and tested. The thermal isolation is achieved through a thick porous silicon layer. Different sensor geometries and material combinations were tested with and without flow. The responsivity dependence of the different structural layers and the geometrical parameters also studied. Two flow velocity ranges with different sensor behavior were studied with sensitivity per heating power equal to 6.0 mV/(m/sec)W and 12.39 mV/(m/sec)^1/2W respectively for low and high flows. The sensor shows very rapid response and the time constant is below 1.5 msec.

An Infra-Red sensor based on a linear array of poly Si-Ge bolometers is presented. The bolometers are surface micromachined devices employing a suspended structure to achieve thermal insulation from the substrate. Linear arrays of 64 pixels have been connected to a CMOS readout chip by means of a Multi Chip Module. The readout chip provides a pulsed bias for the bolometers, amplification of the signal and multiplexes the output in an analog line. At room temperature an NETD of 300mK has been achieved, while the maximum readout speed is 1kHz.

A simple single crystal silicon process for fabricating capacitive type pressure sensors and pressure switches is described. The process relies on silicon fusion bonding for the sealing of the pressure sensor cavity and device construction. The pressure sensor cavity is etched in a thick oxide, thus allowing freedom in cavity design. Pressure sensors and pressure switches have successfully been fabricated using this process. Results are presented of a capacitive type element operating in the medical pressure regime (0-300mmHg) with a sensitivity to pressure of 1.5 fF/mmHg or 305 ppm/mmHg, and of a pressure switch operating at 5 bar for use in truck tyres.

We report on the design, fabrication, and characterisation of a microheater module for chemoresistive, metal-oxide semiconductor gas sensors. The microheater consists of a dielectric stacked membrane with a polysilicon resistor heater element as well as a polysilicon temperature-sensing element. The geometry of both, the membrane and the heater have been optimised by means of finite element computer simulation in order to maximise heating efficiency. These devices complete of the sensing layer require only 30 mW to achieve a temperature of about 400 °C, while conventional thick film sensors fabricated on alumina substrates require typically more than 500 mW to reach the same working temperature. The proposed micromachining technology allows low-power microheaters to be fabricated at low cost and compatible with mass production technology; furthermore silicon micromachining is potentially suitable for the integration of the sensing and the heating element as well as the required electronics into the same battery-operated portable microsystem. The calibration curve of the sensor prototypes for various gases will be presented together with some future development about the microheater structure.

The aim of the presented work is the design of an application specific microsystem for the detection of acoustical signals the frequency components of which vary according to specific periodic patterns. In this category belong signals usually produced by the siren of an emergency vehicle. By analyzing prerecorded data from a typical ambulance siren, it is illustrated how a filter bank of proper length can be used to obtain signal identification. Subsequently, an implementation of the filter-bank is proposed using a microsystem that consists of a number of beam-like elements. The whole analysis reveals how a simple, low-cost microsystem can replace an electronic analog or digital system for the implementation of a filter bank.

Here we describe a bioanalytical microsystem that is based on a capillary format immunosensor. The microsystem developed could perform either in heterogeneous (after washing of the immunoreactants) or in homogeneous detection mode. The advantages of the proposed microsystem are exemplified through the development of dual band heterogeneous immunosensor for the determination of two pesticides (pirimicarb and hexaconazole) Results obtained using the homogeneous version of the proposed bioanalytical microsystem are also provided. Short analysis time, simultaneous determination of different analytes as well as low consumption of sample and antibody are some of the advantages of the proposed immunosensing microsystem.

Ultrathin nanoporous and microporous coatings are of particular interest as top layers of asymmetric porous structures for gas/vapor separations, microreactor and gas/vapor sensors. In this work we find that fabrication of such coatings is possible through the Langmuir-Blodgett deposition of sesquioxane polymers on nanoporous silica tubes and mesoporous and macroporous alumina discs and subsequent plasma. Pore size belongs to the 6-10 Å range and thickness to the 200 Å range.

Resole resin precursors can be converted to continuous microporous carbon layers (pore diameter: 13 Å) of variable microporosity. A novel combination of X-ray powder spectra and pore size measurements suggests that the narrow pore size distribution is the result of formation of carbon nanodomains of two types having similar order and different size, with activation removing preferentially the smaller type. Finally, reference is made to ways of generating asymmetric carbon structures with microporous top layers and to potential applications of such structures.

Bulk Acoustic Wave devices (BAW) are state of the art technologies developed to address the current trends towards miniaturization and chip level integration of communications systems. The substrate plays a key role in device behaviour due to the need to provide support for the resonator thin piezoelectric film (thickness a few microns). The substrate then becomes an integral part of the resonator affecting its performance with extra losses, scattering and possibly cross talk between two adjacent resonators. The results of 2-D simulation of the substrate effect in two BAW resonator geometries are presented aiming at the derivation of "design rules". Our method provides more insight on the device behaviour given that existing methods are 1-D approaches going back to Mason's work. The developed model is based on finite difference analysis and some realistic approximations for the resonators.

Radiation detectors are implemented in medical, environmental, industrial, geological and other applications. Especially X-ray detectors gave the ability to produce, high resolution digital radiography systems. In the present work we conducted theoretical calculations on the transient response of SI GaAs X-ray detectors. The detector under consideration is a typical reverse biased Schottky diode on high purity undopped GaAs or compensated material. The electrical characteristics of the "dark" equilibrium state derived by the Poisson and continuity equations, indicate that in the compensated detector a wider active region is established.

The purpose of this work is to investigate the effectiveness of porous silicon as an isolation material for a silicon integrated gas flow sensor based on a heated resistance and two series of thermocouples. Thermal analysis of the devices is performed for different geometrical designs and different thermocouple materials using commercial software. Simulation results for the optimization of sensor design and comparison with experimental data will be presented.

The thermal conductivity of as prepared and oxidized porous silicon layers was estimated by means of micro-Raman Spectroscopy. The shift in peak position of the Raman Stokes spectra from the same sample spot obtained at two different values of the laser beam power was used in this respect. This shift is due to local temperature increase by increasing the laser power. The sample temperature for a given laser power was estimated in two ways: a) from the temperature dependence of the Raman Stokes frequency, and b) from the intensity ratio of the Raman Stokes to Raman Antistokes peaks. Raman spectra from oxidized porous silicon layers exhibited lower frequencies and they were broader than those from the as-prepared layers due to the presence of smaller crystallites within the material. The thermal conductivity decreased by increasing the oxidation temperature. In oxidized samples, it was almost one order of magnitude smaller than in the as-prepared material. Depth profiling did not show any significant changes of thermal conductivity across the porous layer.

An advanced System-On-A-Chip (SoC) design, capable to undertake all baseband signal processing, is presented is this paper. The development and design aspects of an innovative baseband processor, namely the ASPIS processor, for a dual mode DECT/DCS-1800 wireless terminal are covered in the first part of this paper. The architecture of the system and all the hardware design techniques, testing and software development methodologies are given in details. The second part of this paper concerns the fabrication of this SoC design and the technology used for the building of a MCM-L board that incorporates this baseband processor and its whole memory sub-system.

This paper presents a CAD tool, that can generate the structural description of converters for the Residue Arithmetic System (RNS). This description is based on a previously proposed architecture¹, which has been reported as the most efficient, known to date, in terms of area and delay. This structural description can be the input to a Design Environment, in order to take real silicon measurments of area and delay, or to fabricate the converter. The whole process can be done automaticly, in both PC and HP platforms, aiding the engineer to explore the different design possibilities.

In this paper a novel CAD tool is presented suitable for benchmarking MOSFET models. It is implemented under Cadence® environment and its purpose is to perform various tests on existing MOS models in order to investigate their accuracy and reliability.

A SiGe HBT-BiCMOS Laser Diode Driver (LDD) capable of operating at multi-Gb/s data rates is reported. The design allows for independent adjustment of both DC and modulation current components. Simulation results have verified that the DC bias current of the Laser Diode can be varied between 0 and 12.5mA, whereas the modulation component ranges from 0 to 4mA in order to retain pulse symmetry and still produce a clear eye diagram at 20 Gb/s. The full-custom layout technique used for the implementation, minimizes space requirements as well as parasitic effects. The circuit has been designed using the AMS 0.8µm SiGe HBT-BiCMOS process.

Recent advances in electronic technology and integration coupled with increasing needs for more services in portable communications favors the development of high performance dual-mode terminals. Here, we present the complete architecture and implementation of a novel GMSK/GFSK modulator/demodulator design. The main features of the modulator/demodulator, the methodologies that were followed and the design techniques used are described. The whole architecture of the modulator/demodulator was described in VHDL and then synthesized and implemented in Xilinx environment.

In this paper a new VLSI implementation of the Bluetooth Encryption algorithm, for efficient usage in portable Bluetooth telecommunication systems, is presented. The algorithm modulo operation of polynomials was implemented by using Linear Feedback Shift Registers (LFSR). The measured power dissipation at 32 Mbps is only about 1,12 mW. The whole Bluetooth Encryption/Decryption algorithm was captured by using VHDL language. For the synthesis and simulation commercial available tools were used, but for the power measurements a custom design tool developed in our University was used.

In this paper the issue of designing fully integrated RF VCOs is addressed. The emphasis is given in passive device integration in silicon technologies. On-chip inductors and variable capacitors are presented along with design examples at 5 and 6GHz. An overview of different resonator topologies is made and simple models of passive devices are used to compare them.

The design of a linear and power efficient PA is a large and extensively active research area for a wide range of applications in mobile and terrestrial communication. A number of linearisers are available for commercial use until now, while others are being in a varying degree of development. In this paper techniques that linearise non-linear high efficiency power amplifiers are being briefly presented.

An asynchronous VLSI implementation of the IDEA encryption/decryption algorithm is presented in this paper. In order to evaluate the asynchronous design a synchronous version of the algorithm was also designed. VHDL hardware description language was used in order to describe the algorithm. By using Synopsys commercial available tools the VHDL code was synthesized. After placing and routing both designs were fabricated with 0.6 µm CMOS technology. The two chips were tested, and evaluated comparing with the software implementation of the IDEA algorithm. Although our synchronous design has low power dissipation, the asynchronous one has significantly very low power consumption. The asynchronous implementation achieves 20-40% total power savings comparing with the synchronous one. These integrated circuits can be applied as very fast and low power encryption/decryption devices in high speed networking protocols such as ATM (Asynchronous Transfer Mode) and WEP (Wireless Encryption Protocol).

A fast current amplifier has been designed for use in solid state detectors systems. It provides a differential output and the baseline can be externally adjusted. The dynamic range is high up to 400mips and the gain is switchable. The total rms noise in the case of a 45pF detector capacitance is 2550e^-. Additional circuitry is included in order to compensate for the leakage current of the detector up to 5µA. The design has been implemented in a standard 0.25µm 1P/6M CMOS process.

This work establishes design procedures and directions in the analysis and design of a miniature bandpass filter based on TFRs. Taking advantage of the BVD's simplicity a linear two-port network theory has been applied. Material's electromechanical coupling factor k_eff and quality factor Q define the filter bandwidth (BW) and insertion losses (IL) in the bandpass zone respectively. Consequently the knowledge of Q, k_eff and the thickness of piezoelectric material is enough for simulating the frequency response. A case study consisting of four TFRs in order to implement an on chip bandpass filter with central frequency 1.8 GHz is given as an example.

The novel design of a ripple carry adiabatic adder based on pass-transistor logic is introduced. The architectural design of the adiabatic adder and a formula for delays, are presented. The performance of the ripple carry adiabatic adder, in this work, against the performance of its CMOS counterpart, is discussed. More specifically, the adder (conventional, CMOS or adiabatic) was simulated by PowerMill tool for power dissipation, latency and energy efficiency. In addition, a first estimation of area was done by the transistor count. Both, the conventional and adiabatic adders were simulated at 3.3V and 5V, for a broad range of frequencies, from 5MHz to 50MHz. Experimental results indicate that the adiabatic adder outperforms the corresponding conventional adder in terms of power consumption, and it exhibits a lower hardware complexity.

The problem of maximum power estimation in CMOS VLSI circuits is addressed. Estimation of a chip's maximum power requirements, as they relate to electromigration and IR-drop failures in its supply bus is becoming important as we move into the deep-submicron where guardbanding that has been used up to now is no longer acceptable. An approach of statistical nature, based on recent advances in the field of extreme value theory is proposed. Expertimental results establish our claims and they demonstrate the overall efficiency of the proposed approach in comparison to previously employed techniques.

Voltage Controlled Oscillators (VCOs) are key components in a wide range of high frequency applications. When operating in a phase-locked loop (PLL), the VCO provides a stable local oscillator (LO) for frequency conversion in superheterodyne receivers. The design and realization of a VCO with particular specifications is often a difficult and time consuming procedure for engineers with small experience. This article describes the design of VCOs by means of some basic calculations and CAD software for microwave circuit analysis. With a design of a VCO for DECT tranceiver operating at 945MHz, it is very clear that it is important to account for the following: the effects of paracitics generated by the active device, the circuit layout and component paracitics.

The dynamic power dissipation dependence on the input rise/fall time in low-voltage CMOS circuits is studied and it is efficiently approximated by an additional term in the typical formula. Theoretical calculations using the proposed formula give results very close to those from the simulations.

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The paper gives an overview of recent work by the authors in first-principles, parameter-free calculations of electronic transport in molecules in the context of experimental measurements of current-voltage (I-V) characteristics of several molecules by Reed et al. The results show that the shape of I-V characteristics is determined by the electronic structure of the molecule in the presence of the external voltage whereas the absolute magnitude of the current is determined by the chemistry of individual atoms at the contacts. A three-terminal device has been simulated, showing gain. Finally, recent data that show large negative differential resistance and a peak that shifts substantially as a function of temperature have been accounted for in terms of rotations of ligands attached to the main molecule, a phenomenon that is not present in semiconductor nanostructures.

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