Multichip Modules

The following sections are included:

• INTRODUCTION

• CONTENTS

This paper discusses the early design analysis of large computer systems and presents techniques and models for evaluating the matching between a proposed machine design and an MCM packaging technology. It shows that an early design specification, coupled with a prediction tool, can provide valuable insight into limitations and specific design problem areas, which often only becomes apparent much later in the product cycle. A detailed discussion of the tradeoff between machine performance and package specifications is given along with the details of an interactive early analysis methodology. Detailed models are presented for the early analysis of transmission line constraints, chip placement and coupled noise.

The design and process of Digital Equipment Corporation's VAX 9000 multichip packaging, the MCU (Multichip Unit), is reviewed in some detail. A set of projected future high speed bipolar ECL chip characteristics, in technology improvement increments, is then presented. These characteristics lead to some specific multichip packaging requirements. The corresponding designs of MCU evolutions/extensions are proposed and discussed for meeting the requirements. One major conclusion of the paper is that the present VAX 9000 MCU technology can be extended for several generations of future high end computer applications.

Multichip Module (MCM) packaging has been used in high-end systems, such as mainframe and supercomputers for some time. Rapid advances in VLSI technology and novel system architecture concepts have presented both challenges and opportunities for MCM technologists. We should not just try to find a solution, but also try to take a long-term view and plan the technological development. We would like to develop MCM technology which has a broad range of applications from consumer products to supercomputers. The technology should focus on low cost, high performance, compact size, and high reliability. We believe that it is most attractive to leverage IC technology and surface mount technology (SMT). Therefore we select Si wafer as the substrate, Al as the metallization, polyimide as the dielectrics, Ta-Si as the resistor material, and Si oxide and nitride as the dielectrics for capacitor. Flip-chip solder attachment are used to assemble chips on the substrate. We view our version of MCM as a "giant chip" rather than a miniaturized printed wiring board. This "giant chip" contains mixed device technologies which cannot be obtained by current device technology. The migration path should be from small to large module. The infrastructure of the CAD system and the testing system is critical for the development of MCM technology. Potential applications and implementations of MCM technology are given in this paper.

In this paper we will review the current state of commercial electronic design automation (EDA) tools for the design of multichip modules. MCM can be classified in terms of its substrate technology. The choice of substrate technology has important implications for the selection of design automation tools. A PCB EDA system seems more appropriate for MCMs with stacked via substrate which closely resembles the through-hole printed circuit board (PCB). A chip layout system may be more appropriate for MCMs with low-cost thin-film silicon substrate which typically uses staircase vias. The cofired ceramic substrate MCM which evolved from the hybrid integrated circuit technology may use the specialized hybrid EDA software packages available for the designing of hybrid integrated circuits. Historically, printed circuit board and integrated circuit design automation software evolved separately. There exists a boundary between the printed circuit board and integrated circuit design automation tools in the physical design hierarchy. This boundary can be an important limitation for the repartitioning of the physical design hierarchy within the MCM.

We shall discuss in detail the impact of MCM on various aspects of EDA. In the area of physical design, we must face the traditional placement and routing problem for any high speed design. Problems such as system clock skew and tight timing requirements must be considered. As one push clock frequency higher, one also must consider discontinuities due to vias and bends besides the classical transmission line effect due to long wires. Other traditional physical design problems such as ground and power plane generation, physical design verification and mask tooling must be revisited in the context of various MCM substrate technologies. The thermal aspects of MCM design are strongly influenced by the placement of chips on the MCM substrate. Thermal design is especially important for high density MCMs using the flip-chip mounting technology. Here, the heat must be dissipated through the back of the substrate via thermal pillars or bumps. We still need to deal with the traditional coupled transmission line problems. Due to the small cross section, high performance MCM substrate interconnects are resistive and the transmission lines they form are lossy. Noise is another main problem for MCM design. For high speed MCM with many CMOS buffers, the ground bouncing noise resulting from simultaneous switching of a large number of CMOS drivers must be controlled through proper substrate and package design. We will conclude the paper by comparing existing VLSI and PCB EDA tools for MCM design.

This paper addresses some of the problems encountered in propagating high speed signals on lossy transmission lines on the substrates of thin-film multichip modules. The interconnect lines on thin-film substrate are relatively lossy in the respect that the total resistance of such a line is typically comparable to its characteristic impedance. If such a line were terminated with a load resistor appropriately valued to minimize signal reflections and resonances, the voltage divider formed by the terminating resistance and line resistance causes undesirable attenuation of the output signals. In addition, each terminating resistor dissipates quiescent power on a high density substrate, generating a substantial amount of heat in a small area. Instead of being terminated by resistors, the distributed resistance of the lines are used to critically damp out the signal resonances. With the flexibility of the rubber-band routing and the efficiency of a dynamic data representation based on the constrained Delaunay triangulation, lossy and unterminated transmission lines can be generated to successfully propagate high speed signals. The SURF (Santa-Cruz ULSI Routing Framework) layout system is being developed specifically for thin-film MCM substrate design. The system is performance driven, featuring variable width, variable spacing, evenly distributed spacing, and thermal via insertion. A flexible topological routing model, called rubber-band sketch, together with a dynamic layer representation based on the constrained Delaunay triangulation, is used to control the reflected noise, coupled noise (crosstalk), simultaneous switching noise, and thermal resistance.

The method of characteristics is generalized to simulate the transient response of coupled transmission lines, which are characterized with frequency-dependent parameters. The discrete-time transient simulation is carried out from the equivalent decoupled transmission lines with an arbitrary set of characteristic impedances. The method eliminates the time-consuming convolution integration and has been adapted for iterative waveform relaxation simulation using the Fast Fourier Transform (FFT) for reduction of simulation cost. Examples are given to substantiate the accuracy and the efficiency of both discrete-time and waveform relaxation simulations.