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Analysis, Design and Control of an Integrated Three-Level Buck Converter under DCM Operation

State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao 999078, P. R. China

Institute of Microelectronics, University of Macau, Macao 999078, P. R. China

Department of Electrical and Computer Engineering, Faculty of Science of Technology, University of Macau, Macao 999078, P. R. China

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Wen-Liang Zeng

State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao 999078, P. R. China

Institute of Microelectronics, University of Macau, Macao 999078, P. R. China

Department of Electrical and Computer Engineering, Faculty of Science of Technology, University of Macau, Macao 999078, P. R. China

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Chi-Wa U

State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao 999078, P. R. China

Institute of Microelectronics, University of Macau, Macao 999078, P. R. China

Department of Electrical and Computer Engineering, Faculty of Science of Technology, University of Macau, Macao 999078, P. R. China

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Chi-Seng Lam

http://orcid.org/0000-0003-3669-6743

State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao 999078, P. R. China

Institute of Microelectronics, University of Macau, Macao 999078, P. R. China

Department of Electrical and Computer Engineering, Faculty of Science of Technology, University of Macau, Macao 999078, P. R. China

E-mail Address: cslam@um.edu.mo

E-mail Address: c.s.lam@ieee.org

Corresponding author.

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Yan Lu

State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao 999078, P. R. China

Institute of Microelectronics, University of Macau, Macao 999078, P. R. China

Department of Electrical and Computer Engineering, Faculty of Science of Technology, University of Macau, Macao 999078, P. R. China

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Sai-Weng Sin

State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao 999078, P. R. China

Institute of Microelectronics, University of Macau, Macao 999078, P. R. China

Department of Electrical and Computer Engineering, Faculty of Science of Technology, University of Macau, Macao 999078, P. R. China

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Man-Chung Wong

Department of Electrical and Computer Engineering, Faculty of Science of Technology, University of Macau, Macao 999078, P. R. China

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, and

Rui Paulo Martins

State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao 999078, P. R. China

Institute of Microelectronics, University of Macau, Macao 999078, P. R. China

Department of Electrical and Computer Engineering, Faculty of Science of Technology, University of Macau, Macao 999078, P. R. China

On leave from Instituto Superior Técnico/Universidade de Lisboa, Portugal

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https://doi.org/10.1142/S0218126620500115Cited by:3 (Source: Crossref)

Abstract

A three-level buck (TLB) converter has the characteristics of higher voltage conversion efficiency, lower inductor current ripples, output voltage ripples and voltage stresses on switches when compared with the buck converters in continuous conduction mode (CCM). With a TLB converter integrated on a chip, we cannot avoid its discontinuous conduction mode (DCM) operation due to a smaller inductance and load variation. In this paper, we’ll present and discuss the analysis, design and control of a TLB converter under DCM operation, implemented in a 65nm CMOS process. Transistor level simulation results show that when the TLB converter operates at 100MHz with a 5nH on-chip inductor, a 10nF output capacitor and a 10nF flying capacitor, it can achieve an output conversion range of 0.7–1.2V from a 2.4V input supply, with a peak efficiency of 81.5%@120mW. The output load transient response is 100mV with 101ns for undershoot, and 86mV with 110ns for overshoot when $I_{OUT} = 10$ $I_{OUT} = 10$ –100mA. The maximum output voltage ripple is less than 19mV.

This paper was recommended by Regional Editor Piero Malcovati.

Keywords:

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