BIPOLAR JUNCTION TRANSISTOR AND OTHER BIPOLAR TRANSISTOR DEVICES

The following sections are included:

• INTRODUCTION

• BACKGROUND AND HISTORY

• FABRICATION OF A DOUBLE DIFFUSED SILICON BJT

• D.C. CHARACTERISTICS OF IDEAL AND REAL BJT’S

  • Two-Diode D.C. Circuit Representation of BJT

  • Data of BJT Characteristics

  • Derivation of the D.C. Characteristics of p/n/p BJT

  • The Original and Extended Ebers-Moll Equations of BJT

  • Two-Port Nonlinear D.C. Network Representations of BJT

  • Lumped D.C. Models of Realistic Multi-Dimensional BJT

  • Material and Structural Dependences of D.C. Two-Port Parameters of BJT

  • Bias Dependences of the D.C. Parameters of BJT

  • Collector Multiplication and Negative Resistance

• SMALL-SIGNAL CHARACTERISTICS OF BJT

  • Common-Base Small-Signal Tee (CBss-Tee) Models of BJT

  • Maximum Frequency of Oscillation of BJT

  • Common-Emitter Small-Signal Hybrid-Pi (CESS-HJπ) Model of BJT

  • Common-Emitter Current Gain, Cutoff Frequency and Bandwidth

• LARGE-SIGNAL SWITCHING CHARACTERISTICS OF BJT

  • The Diffusion and Charge-Control Equations

  • Common-Base Large-Signal BJT Switching Transients

  • Common-Emitter Large-Signal BJT Switching Transients

  • Comparison of CB and CE BJT Switching Transients

  • Speeding Up the BJT via Technology

  • Propagation Delay in Ring Oscillator

• CIRCUIT APPLICATIONS OF BIPOLAR JUNCTION TRANSISTOR

  • The BJT Digital Inverters

  • The Common-Emitter BJT Inverter

  • Speeding Up the CE BJT Inverter

  • The Emitter-Coupled 2-BJT Inverter (ECL)

  • The CB-CE Transistor-Transistor Coupled 2-BJT Inverter (TTL)

  • The BIPOLAR-MOS Inverters (BiMOS, BiCMOS, CBiCMOS)

• THE HETEROSTRUCTURE BIPOLAR JUNCTION TRANSISTORS (HBJTs or HBTs)

  • Historical Background

  • Fabrication Methods of Ge_xSi_1-xHBJT

  • Operation Principle of HBJTs

  • Energy Bands and Phonon Spectra of Commensurate Layers

• THE FOUR-LAYER PNPN DEVICES

  • Four-Layer PNPN Diode Characteristics

  • PNPN Triode (SCR) Characteristics

  • MOS-SCR

  • Latch-up in CMOS

• BIBLIOGRAPHY

• PROBLEMS