Research PaperNo Access

Simulation and comparison of single and differential ended CG-CS LNA for Cognitive Radio

Department of Electronics & Communication Engineering, R.M.K Engineering College, RSM Nagar, Kavaraipettai-601206, Tiruvallur, India

E-mail Address: saralailangovan@gmail.com

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S. Rukmani Devi

Department of Electronics & Communication Engineering, R.M.D Engineering College, RSM Nagar, Kavaraipettai-601206, Tiruvallur, India

E-mail Address: rdrukmani319@gmail.com

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Jasmine Hepzibah

Department of Electronics & Communication Engineering, R.M.K Engineering College, RSM Nagar, Kavaraipettai-601206, Tiruvallur, India

E-mail Address: jjh.ece@rmkec.ac.in

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P. Gunasekhar

Department of Electronics & Communication Engineering, R.M.K Engineering College, RSM Nagar, Kavaraipettai-601206, Tiruvallur, India

E-mail Address: pgr.ece@rmkec.ac.in

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, and

J. Joseline Jeya Sheela

Department of Electronics & Communication Engineering, R.M.K Engineering College, RSM Nagar, Kavaraipettai-601206, Tiruvallur, India

E-mail Address: jjn.ece@rmkec.ac.in

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https://doi.org/10.1142/S0219691321500132Cited by:1 (Source: Crossref)

Abstract

In this paper, comparison of common gate-common source single ended and differential ended Low Noise Amplifier (LNA) for Cognitive Radio (CR) receiver is presented. LNA for CR receiver architectures operating over a frequency range of 50–900MHz is designed for narrow band applications. In this work, Noise figure (NF), Third-Order Intercept Point (IIP3), voltage gain and scattering parameters (SP) have been analyzed. The voltage gain is 10.16866dB for single ended and 29.21371dB for differential ended, NF is 1.012dB for single ended and 3.8dB for differential ended. Power gain (S21) obtained is 15.67481dB for single ended and 14.89dB for differential ended. Compression point is $- 5.62487$ $- 5.62487$ dB for single ended and $- 5.32922$ $- 5.32922$ dB for differential ended, Third-Order Intercept Point (IIP3) is 1.97705 for single ended and 5.01608dB for differential ended amplifier, respectively. The design has been implemented using CMOS technology with cadence virtuoso design environment/automation tools.

Keywords:

AMSC: 68M10

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