Narrow Results

Distributed power supply (DPS) systems are extensively used to supply different electronic equipment and systems such as telecom switching systems. Continuous reduction of supply voltages of digital integrated circuits from the previous industry standard of 5 V down to 1 V or even less has necessitated the use of point-of-load system architectures due to high supply currents. The input currents of the switched-mode power supplies contain typically high ripple currents necessitating the use of noise suppression (EMI) filters to meet the stringent requirements stipulated by international standards. The interactions between the load converters, EMI filters, and supply side converters may adversely affect the stability and performance of the system. The system analysis is typically made based on the behavior of the ratio between the output impedance of the supply side and the input impedance of the load side known as minor-loop gain. Certain forbidden regions in the complex plane have been developed out of which the minor-loop gain should stay in order to guarantee stability. Even if the restrictions for the behavior of the minor-loop gain are well-defined, the accurate prediction of the associated impedances is difficult or even impossible. We propose, in this paper, a method based on input invariance to cancel the load-side interactions in the small-signal sense. The only concern left is then the stability of EMI filters, which may be considered based on the input power of the associated converters.

This paper proposes an introducing a feedback control into the dc–dc PWM boost converter with feedforward control, the integrated control circuit can adjust the duty ratio of the converter following the variation of the input voltage and the output load current to get high power conversion efficiency and stabilize the output voltage. The circuit structure of the voltage-mode is relatively simple and only requires a voltage sensing circuit. The converter requires a maximum voltage selector circuit to convert the potential Bulk terminal of the power PMOS and is designed and implemented by using the TSMC 0.18μm 1P6M CMOS Process. Simulation results show that, the boost converter having 1.055×1.077mm² chip size with power efficiency about 93%. This chip can operate with input supply voltage from1.2 V to 1.6 V, and its output voltage can stable at 3.3V and less than 37 mV ripple voltage at maximum loading current 100 mA for micro sensor power module or energy harvesting applications.