Narrow Results

FPGA technology, applied to the case of electronic system, needs to make full use of hardware resources, to achieve great efficiency and yield the largest returns. To apply digital chaotic sequence which consume least resource in encryption system, this paper seeks a tradeoff between logistic and skew tent discrete map aiming at hardware utilization through the method of testing critical precision. Critical precision (or delay) is firstly proposed to weigh the effect of different precision (or delay) on chaotic system according to the autocorrelation property of output sequences. In tests, a controlled variable approach is adopted. Firstly, build graphical module on DSP builder platform in Simulink library, and then transform that into VHDL hardware language running in Quartus II, in which way, considerable time is saved. The results show that: in respective critical precision, the logistic map allows higher hardware utilization and is suitable to lower resource implementation. Meanwhile, compared with skew tent map in the same precision, the autocorrelation, run and balance properties of logistic map are all more superior. Therefore, a logistic map is selected as a key generator in hardware cryptographic system.

In this paper, a new Cellular Automata (CA) Model, named Cellular Automata with Random Memory, has been introduced. The new model is in fact, constructed by randomizing the choosing memory operation of a Cellular Automata with memory. Therefore, the model has a potential usage for application like Random Number Generators, Physical Unclonable Functions. The introduced model and other CA models are represented in an abstract form. Delay lines comprising sequentially connected logic gates are introduced in the implementation of the memory part of the introduced model. Due to the process of variations and jitter effect, the delay line becomes beneficial in the implementation of the proposed Cellular Automata with Random Memory. The introduced model is implemented on a FPGA using delay lines and also using other alternative methods.

This paper constructs a new four-dimensional (4D) hyperchaotic system. Firstly, the influence of parameter variation on the dynamic behavior of the system is analyzed in detail using Lyapunov exponents and the bifurcation diagram. Additionally, the topological horseshoe finding algorithm is based on three-dimensional (3D) hyperchaotic mapping. Through searching for the 3D topological horseshoe with two-dimensional stretching on the Poincaré section, the existence of the 4D hyperchaotic system is proved in the mathematical sense. Next, Lyapunov stability theory and optimization method are used to further analyze the ultimate boundary of the proposed 4D hyperchaotic system. Thus, the 3D ellipsoidal boundary of the hyperchaotic system is found. Finally, this paper also takes the hyperchaotic system as an example and presents the experimental results of generated hyperchaotic attractors by FPGA technology. The experimental results show that the phase diagram of hyperchaotic system is consistent for the simulated results. Due to the more complex dynamic behavior, the proposed system is suitable for engineering application, such as in chaotic secure communications.

This paper deals with a new modified hyperchaotic van der Pol–Duffing (MVPD) snap oscillator. Various dynamical properties of the proposed system are investigated with the help of Lyapunov exponents, stability analysis of the equilibrium points and bifurcation plots. The existence of the Hopf bifurcation is established by analyzing the corresponding characteristic equation. It is also proved that the MVPD oscillator shows multistability with coexisting attractors. Various numerical simulations are conducted and presented to show the dynamical behavior of the MVPD system. To show that the system is hardware realizable, we derive the discrete model of the MVPD system using the Euler’s method and using the hardware–software cosimulation, the proposed MVPD system is implemented in Field Programmable Gate Arrays. It is shown that the output of the digital implementations of the MVPD systems matches the numerical analysis.

In this paper, we announce a novel 4D chaotic system which belongs to the self-excited attractor and hidden attractor family depending on the parameter values. Lyapunov exponents, bifurcation diagram and bicoherence plot of the CAMO (Camouflage) chaotic system are investigated. Also, fractional-order model of the proposed CAMO system (FOCAMO) is derived and analyzed. FOCAMO chaotic system is then implemented in Field Programmable Gate Array (FPGA) using Adomian decomposition method. Also, power efficiency analysis for various fractional-orders is investigated. The paper helps build a better understanding of chaotic systems with self-excited or hidden attractors.

We introduce a new chaotic system with nonhyperbolic equilibrium and study its sensitivity to different numerical integration techniques prior to implementing it on an FPGA. We show that the discretization method used in numerically integrating the set of differential equations in MATLAB and Mathematica does not yield chaotic behavior except when a low accuracy Euler method is used. More accurate higher-order numerical algorithms (such as midpoint and fourth-order Runge–Kutta) result in divergence in both MATLAB and Mathematica (but not Python), which agrees with the divergence observed in an analog circuit implementation of the system. However, a fixed-point digital FPGA implementation confirms the chaotic behavior of the system using Euler and fourth-order Runge–Kutta realizations. Therefore, the increased sensitivity of chaotic systems with nonhyperbolic equilibrium should be carefully considered for reproducibility.

SCA is one of the biggest threats to the security of encryption chip. It can crack the unprotected encryption chip at lower cost and faster speed, which weakens the security of the SM4 encryption algorithm circuit without any protection. In this paper, the SM4 encryption algorithm is implemented on FPGA. The pseudo-random sequence generated by discrete chaotic system is used to randomly mask the intermediate value in the SM4 encryption process. This will disrupt the power consumption in the encryption process, thus preventing power analysis. Experimental results show that the proposed chaotic mask scheme can effectively prevent intermediate value leakage and protect the SM4 encryption system from power analysis attack.

The coupling between neurons can lead to diverse neural network architectures, with the Hopfield neural network (HNN) being particularly noteworthy for its resemblance to human brain function and its potential in modeling chaotic systems. This paper introduces a novel approach: a fractional-order HNN coupled with a hyperbolic tangent-type memristor. Initially, we propose a new model for the hyperbolic tangent-type memristor and fingerprints. Subsequently, we construct a memristor-coupled fractional-order Hopfield neural network (mFOHNN) and explore its dynamic behavior using various analytical tools, including phase diagrams, bifurcation diagrams, Lyapunov exponent diagrams, Poincaré maps, and attractor basins. Our findings reveal rich coexisting bifurcation behavior in the neural network model, influenced by different initial values of coexisting attractors. Finally, we validate the model through analysis and implementation using Multisim circuit simulation software and FPGA hardware, respectively.