International Journal of High Speed Electronics and Systems

The trend to higher integration and higher transmission speed challenges modeling engineers to develop accurate device models up to the Gigahertz range. An absolute prerequisite for achieving this goal are reliable measurements, which have to be checked for data consistency and plausibility. This is especially true for RF data, and also for checking and verifying the applied de-embedding techniques. If this is not the case, RF modeling can become quite time consuming, with a lot of guesswork and ad-hoc judgements, and, basically, frustrating and not correct. If, however, the underlying measurements are flawless and consistent, and provided the applied the models are understood well, RF modeling becomes very effective and provides accurate design kits which will satisfy the chip designer's main goal: right the fist time.

After reviewing the basic concept and general strategies, we have examined a variety of examples of modeling and parameter extraction methods for RF MOSFET's. Modeling and parameter extraction techniques popular in III-V FET modeling were reviewed and recent efforts to model the RF MOSFET and extract the model parameters were examined in light of the differences between the MOSFET and the III-V FET. A very simple and accurate parameter extraction method studied in our laboratory for three-terminal modeling considering charge conservation is also introduced. Our works have two important implications. One is that the consideration for charge conservation is important not only for accurate device modeling and circuit simulation but even more for proper parameter extraction. Another is that one accurate large-signal I-V model is enough to be used for DC, low-frequency analog, as well as RF circuit simulation. Four-terminal modeling based on new equivalent circuits to address the high-frequency effects arising in a MOSFET is very complicated and not practical for CAD applications, even without considering the substrate coupling terms. As a temporary alternative, the macro-modeling approach is examined with various examples.

High frequency (HF) AC and noise modeling of MOSFETs for radio frequency (RF) integrated circuit (IC) design is discussed. Equivalent circuits representing both intrinsic and extrinsic components in a MOSFET are analyzed to obtain a physics-based RF model. Modeling of the intrinsic device and the extrinsic components is disussed by accounting for the important physical effects at both DC and HF. Based on the Y-parameter analysis of the equivalent circuit model, procedures of the HF model parameter extraction are also developed. With the discussed approaches, a sub-circuit RF model incorporating the modeling of parasitics is presented. This model is compared with the measured data for both y parameter and f_r characteristics. Good model accuracy is achieved against the measurements for a 0.25μm RF CMOS technology. The non-quasi-static (NQS) modeling issue has also been discussed by using the BSIM3v3 based RF model to predict the HF characteristics of devices with serious NQS effects. Further, noise modeling issues are discussed by analyzing the theoretical and experimental results in both the flicker noise and thermal noise modeling. Modeling efforts to in corporate new physical effects are needed to predict better the flicker noise characteristics in today's MOSFETs. A detailed analysis of the HF noise parameters has been conducted to establish the relationship between the noise parameters preferred by circuit designers and obtained by HF noise measurement. Analytical calcultion of the noise parameters has also been discussed to understand the noise characteristics with/without some parasitic components such as gate and substrate resistances as well as the influence of the induced gate noise. The HF noise predictivities of several HF noise models are also examined with the measured data. The results show that the BSIM3v3 based RF model can predict the channel thermal noise better than the other models.

This paper presents a through description of radio frequency (RF) noise characterization and modeling of CMOS transistors. It begins with the definition of the four noise parameter of a two-port network - minimum noise figure (NF_min), equivalent noise resistance (R_n), optimized source impedance (R_opt) and optimized source reactance (X_opt). These four parameters are used in device characterization and it is shown how they can be calculated by using the noise two-port network theory and a circuit simulator. Then two de-embedding procedures are discussed in detail for noise and scattering parameter de-embedding to get rid of the parasitic effects from the probe pads and interconnections in the device-under-test (DUT). Ideally there is no frequency and geometry limitation for the method based on a cascade configuration. Methods to directly extract the channel noise, induced gate noise and their correlation from the RF and noise measurements are developed and the extracted noise sources as a function of frequency and bias condition for different channel lengths a presented. Some design consideration for the design of low noise circuits - how to select the device size, choice of DC bias conditions and design device layout, are presented. Finally, some published noise models for the channel noise, induced gate noise and their correlation are discussed.

The new communication markets are vey demanding: high frequency, high degree of integration, low power consumption. Silicon-on-Insulator offers many advantages and this paper illustrates the potentialities of this technology for RF and microwave applictions. After an overview of the SOI material, the properties of the SOI MOSFET's are analyzed and compared to bulk Si MOSFET's. The models of transmission lines and inductors on SOI are compared and further used in the on-wafer characterization of the transistors. Various models for the transistors are presented and their limitations are given. A new model is described, valid from DC to the microwave region. This model agrees very well with the measurements for various transistor dimensions. Finally, variuos RF and microware circuits are presented. Ths paper does not fully describe all the properties and applications of SOI but the numerous references offered to the reader help him to gather more informations.

In this chapter the effects of hot carrier on the reliability of NMOS transistors are investigated. First, it is explained why the hot carrier issue can be important in RF CMOS circuits. Important mechanisms of hot carrier generation are reviewed and some of the techniques used in the measurement of hot carrier damages are explained. Next, results of measurement of DC hot carrier stress on the NMOS transistors are presented. The main focus here is the RF performance of the NMOS devices and circuits mode of them, but DC parameters of the device such as its I-V characteristics and threshold voltage are presented, as they directly affect the RF performance. Finally, using the measurements of hot carrier effects on single NMOS transistors, the effects of hot carriers on three parameters of a low noise amplifier, matching, power gain and stability, are predicted using circuit simulation.