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To restore the vision of blind patients, we developed a fully implantable retinal prosthesis using a three-dimensionally stacked chip consisting of several large-scale integrated circuit (LSI) chips that are stacked vertically and connected electrically using threedimensional integration technology. Our retinal prosthesis chip is small and lightweight, with a high resolution, which increases the patients' quality of life (QOL). In this study, we fabricated a retinal prosthesis module consisting of the retinal prosthesis chip, a flexible cable, and a stimulus electrode array. Our retinal prosthesis chip was not degraded in the module fabrication process. For the first time, we successfully implanted a retinal prosthesis module into a rabbit eyeball. We also fabricated and evaluated coils for power transmission between the extra- and intraocular units in the fully implantable retinal prosthesis.

In this paper, we describe a high-sensitivity, high-resolution, low-power circuit for a fully implantable three-dimensionally stacked retinal prosthesis. This device is composed of a photo-sensor with a current mode readout circuit, an image processing circuit, stimulus current generator circuit, and an electrode array on an intraocular chip. The prototype intraocular chip was fabricated with standard 0.35-µm CMOS technology. Our experimental results confirmed that the frequency of the stimulus current pulse has a linear dependence on the incident light intensity.

We have proposed a new approach to implantable neural recording that we call the intelligent Si neural probe system. The key part of this system is a novel Si neural probe, 40 mm in length. By developing an equivalent circuit model of the Si neural probe, we estimated the optimum structural parameters for recording neuronal action potentials with a high S/N ratio. Si neural probes were successfully fabricated and showed an impedance value of 2.5 MΩ at 1 kHz. Using the fabricated Si neural probe, neuronal action potentials were successfully recorded from the CA1 area in hippocampal slices of guinea pig brain. Additionally, to realize high-density recording, we developed a novel Si double-sided neural probe, which has recording sites on both the front and back, and evaluated this Si double-sided neural probe.

The smart vision chip has a large potential for application in general purpose high speed image processing systems. In order to fabricate smart vision chips including photo detecting function, we have used the three-dimensional integration technology. Three-dimensional integration technology has great advantages to realize a new vision chip system inspired by not only biological function but also biological structure. In this report, we describe our three-dimensional integration technology for both biologically inspired circuits and design of smart vision chips.

Several kinds of electronic approaches to provide visual sensation for blind patients by using retinal prosthesis have been proposed. In most of those prosthetic devices, it is the most important to reduce the power consumption. Therefore, in this work, we propose a novel low-power retinal prosthesis system. In addition, we fabricated a retinal prosthesis chip including photodetectors and stimulus current generators. Furthermore, we confirmed that current waveform parameters can be varied by bias voltages.

We newly introduce three-dimensional (3D) integration technology based on chip-to-wafer bonding into the fabrication of advanced retinal prosthesis chips. By using the 3D integration technology, a photodiode chip, an image processor chip, and an electrical current generator chip can be vertically stacked and electrically connected by a number of short vertical interconnections. The formation of deep Si trenches through dielectric layers is a key process in the chip-to-wafer 3D integration technology. In this etching process, trench profile is an important factor to achieve the complete filling of the resulting deep Si trenches with conductive materials. We have successfully obtained deep Si trenches with a depth of 28 μm through a 7-μm-thick SiO₂ layer by inductively coupled plasma (ICP) etching using a time-modulated bias. High-aspect-ratio deep Si trenches with a top width of 3.0 μm and a bottom width of 2.4 μm were also formed in a Si test chip by the Bosch process.

Three-dimensional (3D) LSI technology is useful for realizing artificial neuromorphic system since it provides a massively interconnected wiring structure similar to the layered structure of living retina or cortex, which is suitable for highly parallel processing. We propose a new 3D stacked vision chip with high fill-factor and high resolution. We have evaluated the basic characteristics of circuits used in vision chip and demonstrated the basic functions of 3D stacked vision test chip fabricated using our 3D integration technology.

We have proposed a novel retinal prosthesis system with three-dimensionally stacked retinal prosthesis chip. We employ the three-dimensional integration technology to realize the high performance retinal prosthesis system. To restore the visual sensation by stimulating the retinal cells, it is essential to determine the optimal stimulus current for designing retinal prosthesis chips. Therefore, we fabricated a stimulus electrode array on a flexible cable for recording of electrically evoked potential (EEP) to optimize the parameters of stimulus current. As a result of animal experiment, the recorded waveform shows a similar behavior to the visually evoked potential (VEP) waveform, indicating possibilities that the electrical stimulation of the retina can restore visual sensation for the blind patients. Furthermore, we developed the Si microprobe for recording of neuronal signals from the animals' brain. By using fabricated Si microprobe, we successfully recorded the neuronal signals from the brain of monkey. This result indicates that Si microprobe array enable us to performed the advanced recording as compared with conventional EEP recording in future.

We propose a new three-dimensional (3D) integration technology using SOI transistors and low-k dielectric material for low power retinal prosthesis chip. In this technology, the crystalline silicon is used only in the transistor channel region. Metal wirings and MOS transistors are completely surrounded by low-k dielectric materials to reduce the parasitic capacitances. Therefore, this technology is indispensable for realizing low-power and high-speed retinal prosthesis chip. To establish such 3D integration technology, we have developed the key technologies such as the wafer bonding and the removal of silicon substrate. In this work, we successfully fabricated the proposed submicron fully depleted (FD) SOI MOSFETs.