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This article explores the comparative optimizing efficiency between two PSO variants, namely, Craziness based PSO (CRPSO) and PSO with an Aging Leader and Challengers (ALC-PSO) for the design of nulling resistor compensation based CMOS two-stage op-amp circuit. The concept of PSO is simple and it replicates the nature of bird flocking. As compared with Genetic algorithm (GA), PSO deals with less mathematical operators. Premature convergence and stagnation problem are the two major limitations of PSO technique. CRPSO and ALC-PSO techniques individually have eliminated the disadvantages of the PSO technique. In this article, CRPSO and ALC-PSO are individually employed to optimize the sizes of the MOS transistors to reduce the overall area taken by the circuit while satisfying the design constraints. The results obtained individually from CRPSO and ALC-PSO techniques are validated in SPICE environment. SPICE based simulation results justify that ALC-PSO is much better technique than CRPSO and other formerly reported methods for the design of the afore mentioned circuit in terms of the MOS area, gain and power dissipation etc.

This paper proposes an efficient design technique for two commonly used VLSI circuits, namely, CMOS current mirror load-based differential amplifier circuit and CMOS two-stage operational amplifier. The hybrid evolutionary method utilized for these optimal designs is random particle swarm optimization with differential evolution (RPSODE). Random PSO utilizes the weighted particles for monitoring the search directions. DE is a robust evolutionary technique. It has demonstrated an exclusive performance for the optimization problems which are continuous and global but suffers from the uncertainty issues. PSO is a robust optimization method but suffers from sub-optimality problem. This paper effectively hybridizes the random PSO and DE to remove the limitations related to both the techniques individually. In this paper, RPSODE is employed to optimize the sizes of the MOS transistors to reduce the overall area taken by the circuit while satisfying the design constraints. The results obtained from RPSODE technique are validated in SPICE environment. SPICE-based simulation results justify that RPSODE is a much better technique than other formerly reported methods for the designs of the above mentioned circuits in terms of MOS area, gain, power dissipation, etc.