Denoising and Beat Detection of ECG Signal by Using FPGA

This paper introduces an efficient digital system design using hardware concepts to filter the Electrocardiogram (ECG) signal and to detect QRS complex (beats). The system implementation has been done using a Field Programmable Gate Array (FPGA) in two phases. In the first phase, Finite Impulse Response (FIR) filters are designed for preprocessing and denoising the ECG signal. The filtered signal is then used as the input of the second phase to detect and classify the ECG beats. The entire system has been implemented on ALTERA DE II FPGA by desinging synthesizable finite state machines. The design has been tested on ECG waves from the MIT-BIH Arrhythmia database by windowing the signal and applying adaptive signal and noise thresholds in each window of processing. The hardware system has achieved an overall accuracy of 98% in the beat detection phase, while providing the detected beats and the classification of irregular heat-beat rates in real-time.

The synthesized hardware of the ECG denoising and beat detection system yields reasonable hardware resources, making the system attractive to be eventually fabricated as a stand alone hardware system or integrated/embedded within a portable electronic device for monitoring patients' heart conditions on a daily basis conveniently.