No Access

Fabrication and Characterization of Four-State Inverter Utilizing Quantum Dot Gate Field-Effect Transistors (QDGFETS)

Bilal Khan

https://orcid.org/0009-0007-5889-1028

Department of Electrical Engineering, University of Connecticut, 352 Mansfield Rd, Storrs, CT 06269, United States

Search for more papers by this author

Roman Mays

https://orcid.org/0000-0002-3047-6056

Department of Electrical Engineering, University of Connecticut, 352 Mansfield Rd, Storrs, CT 06269, United States

Search for more papers by this author

Raja Gudlavalleti

https://orcid.org/0000-0002-7727-8030

Department of Electrical Engineering, University of Connecticut, 352 Mansfield Rd, Storrs, CT 06269, United States

Search for more papers by this author

Evan Heller

https://orcid.org/0009-0005-4405-7089

Synopsis Corporation, NY, USA

Search for more papers by this author

, and

Faquir Jain

https://orcid.org/0000-0003-3961-6665

Department of Electrical Engineering, University of Connecticut, 352 Mansfield Rd, Storrs, CT 06269, United States

E-mail Address: faquir.jain@uconn.edu

Corresponding author.

Search for more papers by this author

https://doi.org/10.1142/S0129156424400706Cited by:0 (Source: Crossref)

This article is part of the issue:

Special Issue on “Nanoelectronics, Nanophotonics, Quantum and Emerging Technologies”
Guest Editors: F. Jain, C. Broadbridge, M. Gherasimova and H. Tang

Abstract

This paper presents the experimental results of nMOS quantum dot gate field-effect transistor (QDG-FET) based four-state inverter fabricated and tested with Si/SiO₂ and Ge/GeO₂ quantum dots. The site-specific self-assembly of SiOx-cladded Si and GeOx-cladded Ge quantum dot layers in the gate region implements both the driver and load FETs in enhancement nMOS inverters. A four-state inverter will allow the reduction of FET count in logic block in microprocessors.

Keywords:

Remember to check out the Most Cited Articles!
Check out these Notable Titles in Antennas

References

1. F. C. Jain, E. Heller, S. Karmakar and J. Chandy , “ Device and circuit modeling using novel 3-state quantum dot gate FETs,” 2007 ISDRS, 2007, pp. 1–2, https://doi.org/10.1109/ISDRS.2007.4422254. Crossref, Google Scholar
2. M. Lingalugari et al., “ Novel multi-state quantum dot gate FETs using SiO2 and lattice-matched ZnS-ZnMgS-ZnS as gate insulators,” Journal of Electronic Materials, 42, pp. 3156–3163, 2013. Crossref, Web of Science, Google Scholar
3. B. Khan, R. Mays, R. Gudlavalleti and F. C. Jain , “ Fabrication and characterization of nMOS inverters utilizing quantum dot gate field effect transistor (QDGFET) for SRAM device,” IJHSES, 31, no. 01n04, pp. 2240010 (1–14), 2022. Google Scholar
4. C. A. Mack , “ Fifty years of Moore’s law,” IEEE Transactions on Semiconductor Manufacturing, 24, pp. 202–207, 2011. Crossref, Web of Science, Google Scholar
5. M. Lingalugari, P.-Y. Chan, E. K. Heller, J. Chandy and F. C. Jain , “ Quantum dot floating gate nonvolatile random access memory using quantum dot channel for faster erasing,” Electronic Letters, 54, p. 36, 2018. Crossref, Web of Science, Google Scholar
6. F. Jain, R. Gudlavalleti, R. Mays, B. Saman, J. Chandy and E. Heller , “ Integrating QD-NVRAMs and QDC-SWS FET based logic for multi-bit computing,” IJHSES, 31, pp. 2240020–1, 2022. Google Scholar
7. S. Karmakar, J. A. Chandy, M. Gogna et al., “ Fabrication and circuit modeling of NMOS inverter based on quantum dot gate field-effect transistors,” Journal of Electronic Materials, 41, 2184–2192, 2012, https://doi.org/10.1007/s11664-012-2116-4. Crossref, Web of Science, Google Scholar