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CURRENT MODE CMOS QUATERNARY LOGIC FULL-ADDER

    https://doi.org/10.1142/S0218126609005022Cited by:1 (Source: Crossref)

    This paper proposes a quaternary-to-binary logic decoder, a quaternary current buffer, and a quaternary full-adder using current-mode multiple-valued logic (MVL) CMOS circuits. The proposed full-adder is superior to the previous MVL CMOS circuit in both the circuit occupied area and the performance. Comparing with the binary logic full-adder, the proposed full-adder is superior in the circuit occupied area. However, the circuit performance is inferior to the binary logic full-adder. The validity and effectiveness of the proposed circuits are verified through the HSPICE under Hynix 0.25 μm standard CMOS technology with the supply voltage 2.5 V.