Area Efficient Memoryless Reverse Converter for New Four Moduli Set {2n−1,2n−1,2n+1,22n+1−1}
Abstract
The efficiency of residue number system depends on the reverse converter due to several modulo operations like addition, subtraction and multiplication. In this paper, a design of new four moduli set {2n−1,2n−1,2n+1,22n+1−1}, reverse converter is presented. The moduli set have moduli with length ranging from (n−1) to (2n+1)-bits. The reverse conversion for moduli set {2n−1,2n−1,2n+1} has been optimized in existing state of art. Thus, proposed converter is based on two new moduli set {2n−1(22n−1),22n+1−1} and utilizes the mixed radix conversion. This converter is memoryless, and occupies least area. The proposed converter is based on carry save adder (CSA) and modulo adder enabling more speed and less hardware complexity for dynamic range of 5n-bit, offering good area-delay product.
This paper was recommended by Regional Editor Emre Salman.