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Low-Power Design of $Σ$ - $Δ$ Modulator Utilizing FIA with Charge-Sharing Module and Two-Tap FIR Filter Embedded

Xiaofeng Chen

https://orcid.org/0009-0006-2342-1678

School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P. R. China

Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P. R. China

R&D Center for Integrated Circuit Engineering of Fujian Province, Xiamen, Fujian 361005, P. R. China

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Wenrun Xiao

https://orcid.org/0000-0002-9571-2443

School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P. R. China

Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P. R. China

R&D Center for Integrated Circuit Engineering of Fujian Province, Xiamen, Fujian 361005, P. R. China

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Xianming Liu

https://orcid.org/0000-0003-1431-0512

School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P. R. China

Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P. R. China

R&D Center for Integrated Circuit Engineering of Fujian Province, Xiamen, Fujian 361005, P. R. China

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Xiaofeng Lin

School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P. R. China

Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P. R. China

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Chao Huang

Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P. R. China

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, and

Donghui Guo

https://orcid.org/0000-0001-5915-4088

School of Electronic Science and Engineering, Xiamen University, 422 Xiangan, South Road, Xiamen, Fujian, P. R. China

Ningbo Institute of Artificial Intelligence Industry, Ningbo, Zhejiang, P. R. China

R&D Center for Integrated Circuit Engineering of Fujian Province, Xiamen, Fujian 361005, P. R. China

E-mail Address: dhguo@xmu.edu.cn

Corresponding author.

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https://doi.org/10.1142/S0218126625500537Cited by:0 (Source: Crossref)

Abstract

This paper presents a low-power fourth-order single-bit switched capacitor sigma-delta modulator implemented by 180nm CMOS technology. In the modulator, the Floating Inverter Amplifier (FIA) with Correlated Level Shift (CLS) technique increasing gain is employed to decrease the modulators power consumption, and a two-tap Finite Impulse Response (FIR) is used in a feedback loop to reduce the integrator output swings. With the help of a simple digital circuit, the mismatches influence on the first-order integrators capacitor is mitigated because of reusing the sampling capacitor. Additionally, the work exploits the charge-sharing module to reduce the integrating capacitors size. The proposed modulator achieves 97.8dB peak Signal-to-Noise and Distortion Ratio (SNDR) at 102.4kHz over a bandwidth of 400Hz under the supply voltage of 1.2V VDD and 1.2V reference voltage while consuming a total power consumption of 3.94 $μ$ W.

This paper was recommended by Regional Editor Giuseppe Ferri.

Keywords:

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