A Performance-Driven DSP Fault Tolerance Approach Based on Loop Optimization

This paper proposes a DSP fault tolerant approach based on loop optimization known as DSP Loop Optimization Approach (DLOA). DLOA reduces the performance overhead incurred by traditional fault tolerance techniques while maintaining their fault tolerance capabilities. DLOA delays the fault tolerance latency between errors detecting and errors handling to scheduling the software pipeline, increasing performance significantly. The performance experiments and the ion irradiation experiments in the Heavy Ion Research Facility in Lanzhou (HIRFL) demonstrated that DLOA used in SWIFT achieved a 6.2 times average speedup and with its fault tolerance ability unaffected.