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In this letter, a tunable high-Q active inductor with high dynamic range is presented. The equivalent inductance and resistance values can be tunable in a wide frequency range by changing the compensating network components values; outside the operating frequency band, the equivalent resistance increases, improving signal rejection for band-pass filter applications. A second-order active band-pass filter with a central frequency of 2100 MHz using the high-Q active inductance has been fabricated and tested.

In this paper, we present a low-voltage tunable active filter for microwave applications. The proposed filter is based on a single-transistor active inductor (AI), that allows the reduction of circuit area and power consumption. The three active-cell bandpass filter has a 1950 MHz center frequency with a -1 dB flat bandwidth of 10 MHz (Q ≈ 200), a shape factor (30–3 dB) of 2.5, and can be tuned in the range 1800–2050 MHz, with constant insertion loss. A dynamic range of about 75 dB is obtained, with a P1dB compression point of -5 dBm. The prototype board, fabricated on a TLX-8 substrate, has a 4 mW power consumption with a 1.2 V power supply voltage.

This paper presents a varactorless tunable active inductor-based voltage controlled oscillator (VCO) in 90nm CMOS process. The proposed VCO yields a wide tuning range of 116% with an output frequency of 1.19–4.46GHz for the tuning voltage of 0.3–1.5V. It consumes a low dc power ranging from 2.44mW to 4.79mW for the specified tuning range. The variation of phase noise ranges from $-83.03$dBc/Hz to $-78.65$dBc/Hz at 1MHz offset with the change of tuning voltage as well as tuning frequency. The proposed varactorless VCO has a maximum Figure of Merit (FOM) of $-148.85$dBc/Hz with a differential output power of 1.8dBm at tuning voltage of 0.7V. The elimination of varactor which abates the silicon area consumption and the minimization of the variation of performance parameters are the special outcomes of the proposed active inductor-based VCO. Comparing the performance parameters such as power consumption, FOM and tuning range, the proposed design outperforms most of the cited designs.

A new CMOS implementation of active inductor circuit based on the gyrator-C which is suitable for low-voltage and RF applications is presented in this paper. One of the critical features of active inductors which directly affect their quality factor is their series-loss resistance. In this regard, a multi-regulated cascade stage is employed in the new structure which decreases loss. Moreover, by cascading input transistor, the transistors which determine the self-resonance frequency and quality factor will be separated from each other. This results in arranging properties of designed active inductor independently. The configuration of two-stage conventional gyrators is improved which gives the proposed design more opportunities in determining and tuning its characteristics. Also by employing common-source configuration, low conductance nodes are achieved which decrease the ohm-loss of AI. Furthermore, main properties of design can be tuned without affecting each other. The power consumption of the circuit remains as low as 0.62mW, then the circuit is suitable for low power applications. The results showed that AI is suitable for RF applications over 0.2–11.8GHz frequency range. In order to verify theoretical calculations, simulations are carried out using HSPICE and level 49 parameters (BSIM3v3) in 130nm CMOS technology. In addition, Corner and Monte Carlo analyses are considered to prove the efficiency of the circuit against the process variation.

This study presents a new wide-tunable, area-efficient and low-phase noise quadrature voltage-controlled oscillator(QVCO). Initially, a modified Colpitts voltage-controlled oscillator (VCO) is proposed in which all transistors are cross-connected in a self-biased scheme to increase negative resistance and facilitate the startup condition. Besides, instead of a passive inductor, a modified tunable active inducer (AI) is used in the proposed Colpitts VCO. Then a new AI-based QVCO is presented by the in-phase anti-phase coupling of two identical Colpitts VCOs. The core VCOs are coupled by the current source transistors of the AI and in this way, no extra coupling devices are used. The proposed AI-based QVCO is designed and simulated in TSMC $0.18\mu \mathrm{\text{m}}$ CMOS technology by Cadence. Post-layout simulation results show that the proposed QVCO occupies only $0.024{\mathrm{\text{mm}}}^2$ of chip area, and has a phase noise of −106.6dBc/Hz at 1MHz offset from the 0.7GHz oscillation frequency. A wide frequency tuning range (FTR) of 68% (i.e., 0.68–1.4GHz) is achieved by adjusting the tuning voltage of the active inductor (AI), and the total power consumption is 7.2mW. Coarse and fine frequency tuning of the QVCO is available by changing the emulated inductors and varactors, respectively, that gives $K_{\mathrm{\text{vco}}}$ of 1100 and 34MHz/V, respectively.