Narrow Results

We report on a compact capacitance model that accurately describes both the gate length dependent and the gate length independent frequency dispersion observed in C-V curves for printed thin film transistors with non-ideal contacts. We also show that modeling the drain current with two adjacent subthreshold regions (instead of just one in the previous RPI TFT model) is needed to match the measured current-voltage characteristics. We show that Elmore model which accounts for channel length transit time is not sufficient for describing the frequency dispersion in C-V curves for printed TFTs and present the new Variable Dispersion Model (VDM). VDM reproduces the experimentally observed gate length independent dispersion arising due to the finite time of the electron exchange between the localized states in the mobility gap and the states above the mobility edge in amorphous semiconductors. The combined Elmore-VDM model has been implemented in AIM-Spice and showed good agreement with measured C-V data.

The structural properties of amorphous silicon models generated with Reverse Monte-Carlo Modeling techniques are presented. The structure factors and radial distribution functions of the generated models closely resemble with the experimental data, but show some dependence on the sample size. However, the coordination defects show no direct correlation with the size of the sample. There exists no peak at 60° in the Si–i–Si bond angle distributions in these samples. The Si–Si–Si bond angle distributions in these samples are quite in good agreement with the Monte-Carlo and Molecular Dynamics simulations data.

The hydrogenerated amorphous silicon a-Si:H thin film transistors TFT with silicon nitride as a gate insulator have been stressed with independently varying gate (V_g), source (V_s), and gate-source (V_gs) bias voltage in order to elucidate the instability mechanism and suggest the new a-Si:H TFT structure. It was found that there was dependency of threshold voltage shift not only on V_gs, but also on V_g and V_s, which had not ever been reported. Its shift amount increased with increasing V_s and/or V_g. In this reports, we suggested the new TFT device structure to eliminate the dependency of Vth shift on V_g and V_s and found that with the new suggested TFT structure, the Vth shift controlling factor can only be V_gs.

The a-Si:H thin film transistors TFT with silicon nitride as a gate insulator have been stressed with negative and positive bias to realize the instability mechanisms. With proposed BT-TFT and FB-TFT devices, it is found that the threshold voltages of both BT-TFT and BT-TFT devices are positively shifted under positive bias stress and then negatively shifted for negative bias stress. The positive threshold voltage shift is due to the electron trapping in the silicon nitride or at the a-Si:H/silicon nitride interface. The negative threshold voltage shift is mainly due to hole trapping and/or electron de-trapping in the silicon nitride or at the a-Si:H/silicon nitride interface. The positive or negative threshold voltage shift keeps increasing with increasing positive or negative gate bias for both BT-TFT and FB-TFT devices. However, as far as the threshold voltage shift slope is concerned, under positive bias stress, both BT-TFT and FB-TFT devices are similar to each other. On the other hand, under negative bias stress, BT-TFT shift amount is much less than one for the FB-TFT device.

The submicron array was fabricated onto a cyclo olefin copolymer (COC) film by a hot embossing method. An amorphous silicon p-i-n junction and transparent conductive layers were then deposited onto it through a plasma enhanced chemical vapor deposition (PECVD) and magnetron sputtering. The efficiency of the fabricated COC-based solar cell was measured and the result demonstrated 18.6% increase of the solar cell efficiency when compared to the sample without array structure. The imprinted polymer solar cells with submicron array indeed increase their efficiency.

The transfer and low frequency noise characteristics of hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) were measured in the temperature range of 230–430 K. The variation of threshold voltage, field effect mobility and sub-threshold swing with increasing temperatures were then extracted and analyzed. Moreover, the shifts of low frequency noise in the a-Si:H TFT under various temperatures are reported for the first time. The variation of flatband voltage noise power spectral density with temperature is also calculated and discussed.

Raman spectroscopy, which is a non-destructive technique, has been used to investigate the effect of sample temperature on indentation-induced crystallographic phase transitions in crystalline silicon and amorphous silicon films deposited on a sapphire crystal. It has been shown that in both types of sample, whereas 300 K Vickers diamond indentations lead to the transformation to the Si-II phase during indenter loading on the crystalline and amorphous samples, there is no such transformation in either sample when it is cooled down to 77 K. An explanation of the experimental results has been provided using the pressure–temperature phase diagram of silicon.

We describe a mechanism that links the long-range potential fluctuations induced by charged defects to the low-frequency resistance noise widely known as 1/fnoise. This mechanism is amenable to the first principles microscopic calculation of the noise spectrum, which includes the absolute noise intensity. We have performed such a calculation for the thin films of hydrogenated amorphous silicon (a-Si:H) under the condition that current flows perpendicular to the plane of the films, and have found a very good agreement between the theoretical noise intensity and the measured one. The mechanism described is quite general. It should be present in a broad class of systems containing poorly screened charged defects.