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Circuits for realizing floating capacitors using grounded capacitors and current conveyors are described. The effect of all the nonidealities of the various current conveyors on the realized impedances has been analyzed in detail.

A new high input impedance filter employing three current feedback amplifiers (CFAs) and six passive elements, three of them are grounded, is presented. The proposed circuit offers the following advantages: simultaneous realization of lowpass (LP), bandpass (BP) and highpass (HP) filtering functions, employs two grounded capacitors, exhibits high input and low output impedances which permits easy cascade connection, low passive sensitivity figures and orthogonal control of resonance frequency (ω_o) and bandwidth (ω_o/Q). PSPICE simulation results are given to verify the theoretical calculations.

A novel filtering topology with a single input and three outputs (SITO) employing a single four-terminal current feedback amplifier (CFA) with an external compensation pin, such as AD844, two operational amplifiers (OAs), and as many resistors is presented. The circuit offers the features of simultaneous realization of lowpass (LP), bandpass (BP), and highpass (HP) filtering functions, free from component matching conditions, cascadability due to high input and low output impedances, orthogonal/independent adjustment of the filtering parameters, and low active and passive sensitivities. PSPICE simulation results are included to confirm the theoretical results.

Traditional continuous-time filters are of integer order. However, using fractional calculus, filters may also be represented by the more general fractional-order differential equations in which case integer-order filters are only a tight subset of fractional-order filters. In this work, we show that low-pass, high-pass, band-pass, and all-pass filters can be realized with circuits incorporating a single fractance device. We derive expressions for the pole frequencies, the quality factor, the right-phase frequencies, and the half-power frequencies. Examples of fractional passive filters supported by numerical and PSpice simulations are given.

In this paper, three dual-mode (mixed-mode) analog filters using only grounded capacitors and two to three second-generation current conveyors (CCIIs) are presented. The first proposed filter can provide a transimpedance-mode (TIM) second-order filter transfer function (TF), and is free from passive component matching constraints, which is advantageous in integrated circuit (IC) design. Other two mixed-mode filters having the property of tunability are derived from the first proposed filter. However, the developed filters in this work, like other active filters, suffer from nonidealities such as nonideal gain and parasitic impedance effects which increase the order of the filter TFs; accordingly, stability problem may arise. In this study, stability analysis using gain and phase margins is accomplished. To explain the claimed ideas, several computer simulations and an experimental test are performed.

A family of current-mode universal biquad filters, realized using the concept of Sinh-Domain signal processing, is introduced in this paper. Both of them have the capability for operating in a low-voltage environment and, also, for orthogonal electronic adjustment between the resonance frequency and Q factor. Employing MOS transistors models from the AMS 0.35 μm process, the performance of the proposed topologies has been evaluated by exploiting the analog design environment of Cadence software.

This paper presents two grounded MOS only active inductor circuits. Both circuits have only two MOS transistors and two biasing currents. Thus, the proposed active inductors provide small chip area, tunability, low power consumption with 150$\mu$W and 90$\mu$W, respectively. To analyze their performance, a second-order band-pass filter and a third-order high-pass filter structures are presented with low noise as 7.5nV/$\sqrt{\mathrm{\text{Hz}}}$ and 9.14nV/$\sqrt{\mathrm{\text{Hz}}}$, respectively. The designed active inductors and filters are simulated in 0.18$\mu$m CMOS process parameters using LTSPICE.

Genetic Algorithm (GA) applications in analog design circuits play an important role with promising results. This paper introduces a proposed methodology based on the genetic algorithm and the symbolic representation to generate equivalent op-amp configurations for well-known filters. The proposed methodology is applied to the Tow-Thomas (TT) filter to generate 168 different configurations. Moreover, it is also applied on the KHN filter resulting in 30 equivalent circuits for each type. A part of the generated realizations is tested through simulations using PSPICE simulator and the simulation results determine the number of accepted circuits. A simulation comparison between the original filter configuration and some of the accepted configurations is done. Fortunately, a better performance compared to the original configuration is obtained from some generated circuits.

In this paper, a robust fault detection methodology for complex analog CMOS integrated filters is presented. It is based on combining the two types of testing methodologies, Oscillation-Based Testing (OBT) and IDDQ testing, i.e., measuring of the power-supply current ($I_{DD}$). The proposed methodology is applied to the Bi-quad Sallen–Key band-pass (BP) filter cell with relatively complex, two-stage, class-AB-output, operational amplifier (opamp) topology. The filter is custom designed targeting the 180-nm CMOS technology. Hundreds of time-domain simulations and analyses of the circuit output signal are performed in order to obtain the fault dictionary. The presented results show that the proposed hybrid OBT–IDDQ methodology is significantly more efficient in the defects coverage than any of the particular test methodologies alone. Subsequently, the specific algorithm for the defects classification is proposed. Based on the classification, certain degree of diagnosis of the individual defect, or a group of defects, can be achieved.