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The People’s Republic of China’s (PRC) fiscal system is characterized by very high expenditure decentralization and heavy reliance on transfers to finance public services. The government’s embrace of inclusiveness and equalization as national goals has raised questions about whether transfers can deliver equalization. This paper seeks to answer this question by analyzing newly available fiscal data compiled from government websites. We find the allocation of central transfers remains strongly region based, resulting in high intra-regional inequality among provinces. Poorer provinces also tend to retain more central transfers at their own (provincial) level. Those provinces with greater pretransfer inequality tend to exert greater equalization efforts, but these are not necessarily proportional to their pretransfer inequality. As a result, some localities are left out of the PRC’s countrywide equalization program. These equalization patterns remained highly persistent during the coronavirus disease shock in 2020. Collectively, the findings highlight that the PRC’s complex intergovernmental fiscal system still poses challenges for equalization.

In this contribution, the nonlinear dynamics of the surplus (net assets or reserve) process for a dividend-distributing company is studied in conjunction with the dynamics of its dividend equalization fund. The latter type of fund is maintained by leading insurance companies throughout the world and pays a special dividend for income that the investors lost because the dividend payment process was adversely affected for some or other reason. In our paper, a stochastic model for the related notion of a dividend equalization solvency ratio is derived. The ambient value of this ratio is an indication of the capacity of the insurer to pay dividends to shareholders especially when profit is low. The aforementioned analysis is, in turn, based on the construction of continuous time stochastic models for the dynamics of the surplus and total liabilities processes of an insurer. The discussions are reliant on principles arising within the asset-liability modelling paradigm.

As microprocessor design scales to nanometric technology, traditional post-silicon validation techniques are inappropriate to get a full system functional coverage. Physical complexity and extreme technology process variations introduce design challenges to guarantee performance over different process, voltage, and temperature (PVT) conditions. In addition, there is an increasingly higher number of mixed-signal circuits within microprocessors; many of them employed in high-speed input/output (HSIO) links. Improvements in signaling methods, circuits, and process technology have allowed HSIO data rates to scale beyond 10 Gb/s, where undesired effects can create multiple signal integrity problems. With all of these elements, post-silicon validation of HSIO links is tough and time-consuming. One of the major challenges in post-silicon electrical validation of HSIO links lies in the physical layer (PHY) tuning process, where equalization techniques are used to cancel these undesired signal integrity effects. Typical current industrial practices for PHY tuning require massive lab measurements, since they are based on exhaustive enumeration methods. In this chapter, dedicated surrogate-based modeling and optimization methods, including space mapping, are described to efficiently tune transmitter and receiver equalizers of HSIO links. The proposed methodologies are validated by laboratory measurements on realistic industrial post-silicon validation platforms.