Narrow Results

Noncoding RNAs (ncRNAs) have important functional roles in biological processes and have become a central research interest in modern molecular biology. However, how to find ncRNA attracts much more attention since ncRNA gene sequences do not have strong statistical signals, unlike protein coding genes. QRNA is a powerful program and has been widely used as an efficient analysis tool to detect ncRNA gene at present. Unfortunately, the O(L³) computing requirements and complicated data dependency greatly limit the usefulness of QRNA package with the explosion in gene database. In this paper, we present a fine-grained parallel QRNA prototype system, FPQRNA, for accelerating ncRNA gene detection application on FPGA chip. We propose a systolic-like array architecture with multiple PEs (Processing Elements). We partition the tasks by columns and assign tasks to PEs for load balance. We exploit data reuse schemes to reduce the need to load matrices from external memory. The experimental results show a speedup factor of more than 18× over the QRNA - 2.0.3c software running on a PC platform with AMD Phenom 9650 Quad CPU for pairwise sequence alignment with 996 residues, however the power consumption of our FPGA accelerator is only about 30% of that of the general-purpose microprocessors.

This paper introduces a new technique for analyzing the behavior of global interconnects in FPGAs, for nanoscale technologies. Using this new enhanced modeling method, new enhanced accurate expressions for calculating the propagation delay of global interconnects in nano-FPGAs have been derived. In order to verify the proposed model, we have performed the delay simulations in 45 nm, 65 nm, 90 nm, and 130 nm technology nodes, with our modeling method and the conventional Pi-model technique. Then, the results obtained from these two methods have been compared with HSPICE simulation results. The obtained results show a better match in the propagation delay computations for global interconnects between our proposed model and HSPICE simulations, with respect to the conventional techniques such as Pi-model. According to the obtained results, the difference between our model and HSPICE simulations in the mentioned technology nodes is (0.29–22.92)%, whereas this difference is (11.13–38.29)% for another model.

This paper presents a complete artificial vision system development and implementation for a mobile robot recognition and obstacles detection, which integrates a statistical segmentation method with frequency filtering in order to achieve luminosity independence, exploiting the advantages of known image processing techniques by mixing them into a robotic application. The system proposed determines the mobile robot's position and orientation, using a color segmentation approach based on the Mahalanobis Distance, and the position and size of obstacles in the robot's environment using a parallel scheme based on both Sobel edge detector and Otsu's threshold. The Mahalanobis distance calculus was implemented using a real-time PPGA architecture, in order to detect the robot's position. Tests in the real robot's environment are presented obtaining results that are independent from the background characteristics and strongly robust on the luminosity variability.

DSP (XC2267) is the main control chip which does the increment PI algorithms and realizes the voltage and current double closed-loop control. Three-phase thyristor rectifier method based on the phase self-adjusting of FPGA is proposed. A method for sweptfrequency start circuit is designed to implement the transition between the high-power and low-power. The invert system uses the compound control of improved PWM and frequency phase lock to improve the control accuracy and efficiency. Lastly, by using bench, the circuit is tested and the feasibility and effectiveness of the whole system are verified.