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Traditional continuous-time filters are of integer order. However, using fractional calculus, filters may also be represented by the more general fractional-order differential equations in which case integer-order filters are only a tight subset of fractional-order filters. In this work, we show that low-pass, high-pass, band-pass, and all-pass filters can be realized with circuits incorporating a single fractance device. We derive expressions for the pole frequencies, the quality factor, the right-phase frequencies, and the half-power frequencies. Examples of fractional passive filters supported by numerical and PSpice simulations are given.

Fractional-order filter design examples, realized through the substitution of fractional-order capacitors and inductors by a re-configurable active emulator, are presented in this paper. The implementation of the emulator is achieved using Current Feedback Operational Amplifiers (CFOAs) as active elements with the required fractional-order differentiation/integration performed through the employment of an integer-order multi-feedback topology. An important benefit, from the design flexibility point of view, is that the same topology could be re-configured for emulating both fractional-order capacitors and inductors through the appropriate selection of the time-constants and gain factors. The behavior of the realized filters is experimentally evaluated using commercially available CFOAs.

This paper presents a generalization of six well-known quadrature third-order oscillators into the fractional-order domain. The generalization process involves replacement of three integer-order capacitors with fractional-order ones. The employment of fractional-order capacitors allows a complete tunability of oscillator frequency and phase. The presented oscillators are implemented with three active building blocks which are op-amp, current feedback operational amplifier (CFOA) and second generation current conveyor (CCII). The general state matrix, oscillation frequency and condition are deduced in terms of the fractional-order parameters. The extra degree of freedom provided by the fractional-order elements increases the design flexibility. Eight special cases including the integer case are illustrated with their numerical discussions. Three different phases are produced with fixed sum of $2\pi$ which can be completely controlled by fractional-order elements. A general design procedure is introduced to design an oscillator with a specific phase and frequency. Two general design cases are discussed based on exploiting the degrees of freedom introduced by the fractional order to obtain the required design. Spice circuit simulations with experimental results for some special cases are presented to validate the theoretical findings.

This study employs the Caputo–Fabrizio and Atangana–Baleanu fractional derivatives to determine the impedance and admittance model of fractional capacitor and inductor. The analog implementation circuits are proposed aiming at fractional-order electric elements based on these two derivatives, which can be widely used in a variety of electrical systems using new fractional operators. Constant phase capacitor and inductor are approximated by the Oustaloup algorithm and the recursive net-grid-type analog circuit, respectively. Based on that, approximation circuits of fractional electric components under Caputo–Fabrizio and Atangana–Baleanu definitions are given. For the purpose of judging whether the implementation topology of fractional-order capacitor and inductor is accurate, taking fractional RC and RL circuit defined by Caputo, Caputo–Fabrizio and Atangana–Baleanu derivatives as examples, the comparison of numerical and circuit simulations is carried out. The correctness of the analog implementation circuits using the Caputo–Fabrizio and Atangana–Baleanu definitions is verified. Fractional-order RC charging circuit experiments based on Caputo, Caputo–Fabrizio and Atangana–Baleanu derivatives are taken as examples. Several experiments with different fractional-order and circuit parameters are carried out. The validity of the implementation methods is ulteriorly proved with experiment data.

A fractional-order digital differentiator is employed for the calculation of a time-derivative of the applied signal. In the recent few decades, this particular concept of a fractional derivative has been gaining a lot of attention in various applications concerning engineering, technology and science that includes image processing along with automatic control. Once there has been an effective use for this continuous-time Fractional-Order Differentiator (FOD), the trend in its research is primarily toward using a discrete-time fractional differentiator. All these conventional techniques tend to make use of a unimodal function for approximating an ideal FOD. For these techniques, there is a minimization of the fitness function that is accomplished by the algorithms which are based on the gradient. The fractional-order circuits along with their systems include an emerging area that has a high level of potential in aspects such as the biomedical instrumentation, control or signal processing. A digital differentiator is a tool that is extremely helpful in the determination and estimation of time derivatives of any given signal. Irrespective of the actual type of filter chosen (the Finite Impulse Response (FIR) or the Infinite-Length Impulse Response (IIR)), it is critical to bring down the complexity of computation needed for the implementation of the filter for a certain bandwidth and error of approximation. A metaheuristic algorithm normally has some advantages in the solving of problems which are Non-Deterministic Polynomial (NP)-hard. The Shuffled Frog Leaping Algorithm (SFLA) has been a new heuristic algorithm proposed in this work for the determination of optimal coefficients of the problem of FIR-FOD. A design for fractional-order-based digital differentiator is not a very important topic in research and signal processing.