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This paper presents monolithic integrated InAlN/GaN NAND and NOR logic cells comprising depletion-mode, enhancement-mode and dual-gate enhancement-mode high electron mobility transistors (HEMTs). The designed NAND and NOR logic cells consist of the depletion-mode and enhancement-mode HEMT transistors integrated onto a single die. InAlN/GaN-based NAND and NOR logic cells with good static and dynamic performance are demonstrated for the first time. Calibrated static and dynamic electrophysical models are proposed for 2D device simulations in Sentaurus Device environment. Sentaurus Device mixed-mode setup interconnects the transistors to NAND and NOR logic circuits which allows analysis and characterization of the devices as a complex system. Circuit models of depletion-mode, enhancement-mode and dual-gate HEMTs are designed and calibrated by experimental results and 2D device simulations. The proposed models exhibit highly accurate results.

A Langevin approach to understand the noise of microwave devices is presented. The device is represented by its equivalent circuit with the internal noise sources included as stochastic processes. From the circuit network analysis, a stochastic integral equation for the output voltage is derived and from its power spectrum the noise figure as a function of the operating frequency is obtained. The theoretical results have been compared with experimental data obtained by the characterization of an HEMT transistor series (NE20283A, by NEC) from 6 to 18 GHz at a low noise bias point. The reported procedure exhibits good accuracy, within the typical uncertainty range of any experimental determination. The approach allows to extract all the information required for understanding the noise performance of the device without any restriction on the statistics of the noise sources. The results show the relevant noise phenomena from a new angle.