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III-Nitride Metal-Oxide-Semiconductor Heterojunction (MOSH) structure consists of a thin dielectric layer deposited on top of a semiconductor heterostructure with a 2D electron gas at the heterojunction interface. MOSH structures are the key components for high-power low-loss, fast RF switches. The paper discusses two types of high-power switches using III-Nitride MOSH structures. The first type uses the MOSH structure as the gate region of an AlGaN/GaN HFET. The second type uses MOSH structure as a switching capacitor. In the 2GHz - 10 GHz frequency range, switching powers from 20 to 60 W/mm have been achieved with the insertion loss below 1 dB.

We describe a new analytical model of a Heterostructure Field Effect Transistors (HFETs) that accounts for electron trapping in the gate-drain spacing of the device and for related non-ideal device behavior. Under conditions of a very strong trapping, the electron velocity saturates outside the gate, in the trapping region, and the negative trapped charge leads to relatively large differential output conductance at the drain voltages exceeding the knee voltage. Also under the conditions of severe trapping, the negative trapped charge leads to the positive offset of the output current-voltage (I-V) characteristic. The model describes quite well numerous experimental data for passivated and unpassivated AlGaN/GaN HFETs with and without field plates (FP) under different bias conditions.

We have fabricated and investigated several types of GaN MOSFETs with normally-off operation. The recessed-gate GaN MOSFET is preferred for normally-off operation, because the threshold voltage (V_th) of the device can be easily controlled, but it suffers from relatively modest current drivability which must be improved by adopting appropriate device structure and/or process. Enhanced performances have been achieved in this work by combining the recessed-gate technology with additional processes, such as: the post-recess tetramethylammonium hydroxide (TMAH) treatment to remove the plasma damage, the post-deposition annealing of gate oxide to decrease the gate leakage current, the re-growth of n+ GaN layer for source/drain to improve the access resistance and V_th uniformity, the stress control technology to achieve extremely high 2-D electron-gas density (2DEG) on source/drain and decrease the series resistance, and the use of the p-GaN back-barrier to decrease the buffer leakage current. The GaN-based FinFET with very narrow fin was also investigated as a possible candidate for high performance normally-off GaN MOSFETs.