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Many of the new high-speed high-integration density Integrated Circuits (ICs) and future generation of microprocessor powering requirements can be successfully achieved with voltage-mode hysteretic control applied to interleaved multiphase Point-of-Load (POL) DC–DC converters or Voltage Regulator Modules (VRMs). This is because of the several advantages that can be achieved by combining the advantages of hysteretic control and interleaving. However, there are several challenges in combining the two techniques, the most prominent being the current sharing and equalization between the interleaved phases. In this communication, we present a solution based on a real-time DSP controller. Challenges of the implementation will be discussed and experimental results obtained from a prototype will be presented.
The main purpose of this paper is to examine the influence of time delay associated with a semi-active variable viscous (SAVV) damper on the response of seismically excited linear and nonlinear structures. The maximum time delay is estimated on the basis of stability criteria, which consist of analyses of structural modal properties. Numerical computation of the critical time delay is performed by using dichotomic approach, which is based on multiple solving of the eigenvalue problem. Simulation results indicate that variable dampers can be effective in reducing the seismic response of structures, and that time-delay effects are important factors in control design of seismically excited structures. Furthermore, simulation results show degradation of performance whenever the actual delay exceeds the calculated critical time delay, which shows the accuracy and reliability of the proposed approach.