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Metamorphic semiconductor devices such as high electron mobility transistors (HEMTs), light-emitting diodes (LEDs), laser diodes, and solar cells are grown on mismatched substrates and typically exhibit a high degree of lattice relaxation. In order to minimize the incorporation of threading defects it is common to use a linearly-graded buffer layer to accommodate the mismatch between the substrate and device layers. However, some work has suggested that buffer layers with non-linear grading could offer superior performance in terms of limiting the surface density of threading defects. In this work, we have compared S-graded buffer layers with different orders and thicknesses. To do so we calculated the expected surface threading dislocation density for each buffer design assuming a GaAs (001) substrate. The threading dislocation densities were calculated using the L_MD model, in which the coefficient for second-order annihilation and coalescence reactions between threading dislocations is considered to be equal to the length of misfit dislocations.

Metamorphic semiconductor devices often utilize compositionally-graded buffer layers for the accommodation of the lattice mismatch with controlled threading dislocation density and residual strain. Linear or step-graded buffers have been used extensively in these applications, but there are indications that sublinear, superlinear, S-graded, or overshoot graded structures could offer advantages in the control of defect densities. In this work we compare linear, step-graded, and nonlinear grading approaches in terms of the resulting strain and dislocations density profiles using a state-of-the-art model for strain relaxation and dislocation dynamics. We find that sublinear grading results in lower surface dislocation densities than either linear or superlinear grading approaches.

Further reduction of normal forms for nilpotent planar vector fields has been considered. Unique normal form for a special case of an unsolved problem for the Takens–Bogdanov singularity is given. Computations in Maple are used to conjecture the main results and some computations in the proof are also done with Maple.

Metamorphic semiconductor devices such as high electron mobility transistors (HEMTs), light-emitting diodes (LEDs), laser diodes, and solar cells are grown on mismatched substrates and typically exhibit a high degree of lattice relaxation. In order to minimize the incorporation of threading defects it is common to use a linearly-graded buffer layer to accommodate the mismatch between the substrate and device layers. However, some work has suggested that buffer layers with non-linear grading could offer superior performance in terms of limiting the surface density of threading defects. In this work, we have compared S-graded buffer layers with different orders and thicknesses. To do so we calculated the expected surface threading dislocation density for each buffer design assuming a GaAs (001) substrate. The threading dislocation densities were calculated using the L_MD model, in which the coefficient for second-order annihilation and coalescence reactions between threading dislocations is considered to be equal to the length of misfit dislocations.

Metamorphic semiconductor devices often utilize compositionally-graded buffer layers for the accommodation of the lattice mismatch with controlled threading dislocation density and residual strain. Linear or step-graded buffers have been used extensively in these applications, but there are indications that sublinear, superlinear, S-graded, or overshoot graded structures could offer advantages in the control of defect densities. In this work we compare linear, step-graded, and nonlinear grading approaches in terms of the resulting strain and dislocations density profiles using a state-of-the-art model for strain relaxation and dislocation dynamics. We find that sublinear grading results in lower surface dislocation densities than either linear or superlinear grading approaches.