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Implantable biomedical sensors and continuous real time in vivo monitoring of various physiological parameters requires low-power sensor electronics and wireless telemetry for transmission of sensor data. In this article, generic blocks required for such systems have been demonstrated with design examples. Ideally neural or electro-chemical sensor signal monitoring units comprise of low noise amplifiers, current or voltage mode analog to digital domain data conversion circuits and wireless telemetry circuits. The low-noise amplifier described here has a novel open loop amplifier scheme used for neural signal recording systems. The design has been implemented using 0.5-μm SOI-BiCMOS process. The fabricated chip can work with 1 V supply and consumes 805 nA. The current mode analog to digital conversion signal processing circuitry takes the current signal as an input and generates a pulse-width modulated data signal. The data signal is then modulated with a high frequency carrier signal to generate FSK data for wireless transmission. The design is fabricated in 0.5-μm standard CMOS process and consumes 1.1 mW of power with 3.5 V supply.

In this paper, a fully differential difference amplifier (FDDA) designed in 0.35$\mu$m CMOS technology is presented. The proposed amplifier reaches high dynamic range (DR) and low input referred noise. Comparison of noise performance of the proposed FDDA to an ordinary differential amplifier has been performed. Achieved results prove that the developed amplifier circuit can be advantageously used in applications that require a fully differential signal. Then, simulation results have been verified by the measurement of prototyped chips. In our work, the proposed amplifier was experimentally employed in the analog frontend of the readout interface (RI) for a Micro-Electro-Mechanical-Systems (MEMS) capacitive microphone.

This paper presents a high-efficiency operational amplifier (op-amp) used in the readout circuit of micro-sensor. The chopping and dynamic element matching (DEM) techniques are used in the proposed design, which greatly reduce the offset voltage and flicker noise $(1/f$ noise) of the op-amp. By optimizing the circuit structure, the maximum chopping frequency is increased to 2MHz when the offset voltage is less than $20\mu$V. Therefore, the maximum bandwidth of signal processing can be up to 1MHz. The proposed circuit is designed and fabricated using TSMC 0.18-$\mu$m 1P5M CMOS technology. It occupies an area of 0.16mm² and consumes $75\mu$A from a 1.8-V supply. When the chopping frequency is 100kHz, the input-referred offset voltage is 4.21$\mu$V and the input-referred noise is 42nV$/\surd$Hz. It achieves a noise efficiency factor of 7.82 and a power efficiency factor of 110.07.

Implantable biomedical sensors and continuous real time in vivo monitoring of various physiological parameters requires low-power sensor electronics and wireless telemetry for transmission of sensor data. In this article, generic blocks required for such systems have been demonstrated with design examples. Ideally neural or electro-chemical sensor signal monitoring units comprise of low noise amplifiers, current or voltage mode analog to digital domain data conversion circuits and wireless telemetry circuits. The low-noise amplifier described here has a novel open loop amplifier scheme used for neural signal recording systems. The design has been implemented using 0.5-μm SOIBiCMOS process. The fabricated chip can work with 1 V supply and consumes 805 nA. The current mode analog to digital conversion signal processing circuitry takes the current signal as an input and generates a pulse-width modulated data signal. The data signal is then modulated with a high frequency carrier signal to generate FSK data for wireless transmission. The design is fabricated in 0.5-μm standard CMOS process and consumes 1.1 mW of power with 3.5 V supply.