Narrow Results

Meminductor has attracted more and more attention as the new memory element. In this paper, a new generic meminductor model is proposed and analyzed. Its emulator is designed and its pinched hysteresis loop is presented. Based on the established meminductor and using a traditional capacitor and resistor, a new simple chaotic circuit presenting double-scroll chaotic attractors is proposed and its dynamical behaviors including phase portrait, Lyapunov exponents, Poincare mapping, power spectrum, bifurcation and the sensibility of initial value are analyzed. Meanwhile, it has been found that hidden attractors and transient chaotic phenomena under different initial value. Finally, the hardware circuit for the proposed simple double-scroll chaotic system is constructed and some experimental results are presented for validating the correctness of the theoretical analysis.

This paper presents six different meminductor emulator circuits based on operational amplifiers. Five circuits of meminductor emulators have been proposed using two operational amplifiers, one memristor, three resistors and one capacitor, whereas the sixth circuit uses two operational amplifiers, two memristors, one resistor and two capacitors. All circuits of the proposed meminductor emulators are very simple over most of the realizations of meminductor emulators in the literature. The behaviors of meminductor emulators are satisfactory over a wide range of frequencies. The proposed configurations of meminductor emulators have been simulated by the LTspice tool. The SPICE models of both operational amplifier (AD711) and memristor have been used for simulation. The workability of the proposed meminductor emulators has also been verified using the basic and well-known structure of operational amplifier. In addition, the pinched hysteresis loop obtained by the simulation results of meminductor emulator has been achieved by the experimental results as well. Chaotic oscillator has been designed using the proposed meminductor emulator to prove the worthiness of the design.

In this paper, two simple circuits are presented to emulate both memcapacitor and meminductor circuit elements. The emulation of these components has crucial importance since obtaining these high-order elements from markets is difficult when compared to resistor, capacitor and inductor. For this reason, we proposed Multi-Output Operational Transconductance Amplifier (MO-OTA)-based electronically controllable memcapacitor and meminductor circuits. To operate the MOS transistor as a capacitor, drain and source terminals are connected to each other. The memcapacitor behavior is obtained by driving the connected terminals with suitable voltage values. Only a few active and grounded passive components which are found in markets easily are used to emulate meminductive behavior. Furthermore, all passive elements in the circuit are grounded. All simulation results for memcapacitor and meminductor emulators are obtained successfully when compared to previous studies. For all analyses, MO-OTA is laid using the Cadence Spectre Analog Environment with TSMC 0.18$\mu$m process parameters and occupied a layout area of only 86.21$\mu \mathrm{\text{m}}\times 34.67\mu$m.

In this paper, new memristor-less meminductor emulators have been proposed using voltage differencing transconductance amplifier (VDTA), current differencing buffered amplifier (CDBA) and a grounded capacitor. The proposed decremental/incremental meminductor emulators have been realized in both grounded and floating types of configurations. In the proposed meminductor emulators, analog multiplier, memristor and passive resistors are not used which result in simpler configurations. The pinched hysteresis loops are maintained up to 2MHz for both decremental and incremental configurations of meminductor emulators. The behaviors of decremental and incremental meminductor emulators have been analyzed after applying input pulses. The obtained results verify the performances as decremental and incremental meminductor emulators. The simulation results have been obtained using Mentor Graphics Eldo simulation tool with 180nm CMOS technology parameters. To verify the performances of the proposed meminductor emulators, adaptive learning circuit and chaotic oscillator have been designed. The performances of the proposed meminductor emulators are compared with other meminductor emulators reported in the literature.

For the first time, a new memristor emulator structure using a single four-terminal floating nullor (FTFN) and a transconductance stage has been presented with tunable circuit configuration. Along with that the circuit requires only a single grounded capacitance and two external MOS transistors to realize both incremental and decremental types of memductance functions. The use of the FTFN block has been demonstrated for the first time to build such a compact memristor emulator, which fully utilizes the employed circuit resources. The wide-band operating frequency range (1 kHz–3 MHz) is another attractive feature of the proposed emulator. Moreover, the mutation of the proposed memristor emulator into meminductor and memcapacitor emulators is also presented by the mutators based on FTFN. All the presented circuits have been tested by performing simulations using PSPICE with 0.18-$\mu$m CMOS technology. The generated simulation results clearly show the ideal nonvolatile nature of the realized memristor, which has also been utilized in an op-amp-based circuit designed to exhibit associative learning phenomena. The proposed FTFN-based memristor has been implemented using commercially available ICs, LM13700, and AD844, and the generated PHL plot is discussed.

This paper presents a floating meminductor emulator circuit using a voltage differencing inverted buffered amplifier (VDIBA), current follower (CF), and two grounded capacitors. The parasitic resistance at the input terminal of the current follower has been utilized. The idea of implementing a meminductor emulator is simple and works on the principle of putting memory inside the active inductor circuit. A capacitor (memory element) has been charged by the current flowing through the active inductor circuit. Therefore, the proposed meminductor emulator can be viewed as an active inductor circuit having memory inside it. The proposed floating meminductor emulator works over a significant range of frequencies and satisfies all the characteristics of a meminductor. The meminductor emulator has been realized and simulated in the LTspice simulation tool using TSMC’s 180-nm CMOS technology parameters. A chaotic oscillator circuit has been realized using the proposed meminductor emulator to verify its performance. The results obtained for the chaotic oscillators are found to be satisfactory and thus verify the performance of the proposed meminductor emulator.