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In this paper, we presented Multi-Output Operational Transconductance Amplifier (MO-OTA)-based floating memristor emulator circuit. The designed memristor circuit has only one MO-OTA and one grounded capacitor which is attractive for an integrated circuit. It does not consist of any multiplication circuit block to obtain nonlinear behavior of memristor. It is difficult to obtain the hard-switching voltage–current relationship than the smooth-switching voltage–current relationship of memristor but we obtained hard-switching voltage–current characteristics using single floating memristor circuit. The complete memristor circuit is laid by using Cadence Environment using TSMC 0.18$\mu$m process parameters. The layout area of MO-OTA occupies an area of 34$\mu$m $\times$ 14$\mu$m. Its post-layout simulation results are given to demonstrate the performance of the presented memristor emulator in different operating frequencies, process corner and radical temperature changes. All post-layout simulations agree well with theoretical analyses. As application examples, different connections such as serial, parallel and single of memristor emulator are investigated to test its connectivity.

A charge-controlled memristor emulator circuit based on one kind of active device [operational transconductance amplifier (OTA)] using CMOS technology is introduced in this paper. The proposed circuit can be configured in both incremental and decremental types by using a simple switch. The memristor behavior can be electronically tuned by adjusting the transconductance of the OTAs. By changing the value of the capacitor, the pinched hysteresis loop observed in the current versus voltage plane can be held at higher frequencies. The proposed emulator circuit functions well up to 500 kHz. The experiment has been performed using commercially available OTA ICs (CA3080). The experimental demonstration has been carried out for 10, 20 and 120kHz. A simple high-pass filter is explained in both configurations to demonstrate the functionality of the proposed memristor emulator. The proposed circuit has been simulated in PSPICE using 0.5-$\mu$m CMOS parameter. The simulated and experimental results validate the theoretical proposition.

In this paper, we present second generation current-controlled conveyor (CCCII)-based simple memristor circuit which exhibits a hard-switching voltage-current relationship. The proposed memristor circuit contains only single CCCII and single grounded capacitor that are attractive for the integrated circuit designers. The proposed memristor emulator has four main advantages: hard-switching behavior, not utilizing multiplier circuit, biasing current or voltage source (excluding DC current or voltage source), and being free of body effect for all transistors. Cadence Spectre Analog Environment with TSMC 0.18$\mu$m process parameters is used for all simulations. The memristive chip occupies only 81.85$\mu$$\text{m}\times 87.76$$\mu$m area. All simulation results are presented to demonstrate the performance of the proposed circuit by changing some parameters such as frequency, temperature, DC power supply voltages and process variations. Also, the robust performance of the proposed memristor is confirmed via Monte Carlo simulations. The simulation results for designed memristor are in accordance with theoretical memristive behavior.