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This paper presents a fast and simple space vector modulation algorithm for voltage source multilevel converters for calculating the switching times and the space vectors using simple geometrical considerations. This method provides the nearest switching vectors sequence to the reference vector and calculates the on-state durations of the respective switching state vectors without involving trigonometric functions, look-up tables or coordinate system transformations which increase the computational load corresponding to the modulation of a multilevel converter. The low computational cost of the proposed method is always the same and it is independent of the number of levels of the converter. In addition, a new switching sequence control technique is presented for reducing the ripple of the DC-link voltage approximately in 66%.

Class-D amplifier features very high efficiency on power delivery because its switching operation consumes tiny static power on very low on-resistance. In this work, a multilevel technique is presented to improve total-harmonic-distortion (THD) and signal-to-noise-ratio (SNR) of pulse-width-modulation (PWM) filterless class-D amplifiers. The proposed method consists of a multilevel converter and a time division adder (TDA) followed by PWM modulator. The PWM-modulated signal is arranged into several time divisions and then integrated and encoded to a set of parallel control signals for multilevel converter. Instead of the two-level PWM signal, the output signal of a multilevel converter is as stairway with less transient variation. The performance of THD and SNR are therefore improved because the instantaneous variation of signal is greatly reduced. To demonstrate the proposed method, a filterless audio amplifier was implemented by TSMC 5 V–0.35 μm CMOS technology. With 8 Ω speaker and 550 mW maximum power, experiment results show that the THD, SNR and power efficiency can be achieved over 0.02%, 85 dB and 85%, respectively.

The applications of multilevel converters (MCs) in industry have been increased because of their advantages such as high quality output waveform and lower harmonic distortions. This paper proposes an improved two-leg ladder topology for MC. For generating all levels at output voltage waveform, two methods are investigated for selecting the values of dc sources. The suggested structure generates a large number of levels at output voltage waveform with the least number of power electronic components such as insulated gate bipolar transistors, gate driver circuits, dc voltage sources and anti-parallel diodes in comparison with other similar topologies. Also, the magnitude of blocked voltage by switches is low. Power losses analysis on the proposed topology is provided. It is shown that the number of on-state switches in the presented structure is less than other similar topologies, which causes the voltage drop and power losses of proposed topology to be reduced. To show the merits of the proposed structure, comparison results are provided with other structures. To validate the analytical results of proposed topology, an experimental work for a 9-level converter and the simulation results for a 25-level converter are provided. PSCAD/EMTDC software is used for simulation works.

In this paper, a new structure for multilevel converter based on improved H-bridge converter is presented. The proposed topology is a symmetric topology since the values of all voltage sources are equal. The proposed symmetric structure is a general topology which can be extended for any number of voltage levels at output voltage waveform to obtain the least value of total harmonic distortion (THD). Reduction of switching losses, conduction losses, the number of on-state switches in the current path, utilized DC voltage sources, and gate driver circuits are the main advantages of proposed symmetric structures in comparison with other symmetric topologies. All mathematical analysis on the proposed structure is presented in terms of power losses and maximum blocked voltage by switches. The comparison results with other recently presented symmetric topologies and traditional multilevel converter structures are provided. Experimental results for a thirteen-level converter based on presented structure are provided to validate the practicality of the suggested multilevel structure.

This paper presents a new switched-ladder structure for multilevel converter which consists of several bidirectional and unidirectional switches along with DC voltage sources. The values of DC sources in the proposed topology are determined based on a new mathematical algorithm. The proposed multilevel converter is an extended structure, which can produce any levels at output voltage waveform. To prove the merits of the proposed structure, the proposed converter is compared with other similar structures. According to comparison results, it is shown that the presented structure requires the least numbers of DC sources, IGBTs, drivers and on-state switches. Also, the value of voltage rating of the switches is analyzed. The experimental results are provided for the proposed 17-level converter to prove the performance of suggested structure.