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We review some of our previous work on field-coupling in nano-scale cellular arrays. Electronic devices based on metallic and magnetic nanoscale dots and molecular structures have been suggested, however, no technologically viable architecture for nanoelectronic circuit integration has emerged so far. A natural architecture on the nanoscale appears to be near-neighbor cellular networking, and we explore promising alternative ways of integrating nanodevices by direct physical field coupling, i.e. either by Coulomb or by magnetic interactions. We review new architectures for such field-coupled nanocircuits.

The single electron transistor (SET) is a nanometer-size device that turns on and off again every time one electron is added to it. In this article, the physics of the SET is reviewed. The consequences of confining electrons to a small region of space are that both the charge and energy are quantized. We review how the charge states and energy states of the confined electrons, sometimes called an artificial atom, are measured, and how the precision of these measurements depends on temperature. We also discuss the coupling of electrons inside the artificial atom to those in the leads of the SET, which results in the Kondo effect. We review measurements of the Kondo effect, which demonstrate that the Anderson Hamiltonian provides a quantitative description of the SET.

Innovations in electronics history have been possible because of the strong association of devices and materials research. The demand for low voltage, low power and high performance are the great challenges for engineering of sub 50nm gate length CMOS devices. Functional CMOS devices in the range of 5 nm channel length have been demonstrated. The alternative architectures allowing to increase devices drivability and reduce power are reviewed through the issues to address in gate/channel and substrate, gate dielectric as well as source and drain engineering. HiK gate dielectric and metal gate are among the most strategic options to consider for power consumption and low supply voltage management. It will be very difficult to compete with CMOS logic because of the low series resistance required to obtain high performance. By introducing new materials (Ge, diamond/graphite Carbon, HiK, …), Si based CMOS will be scaled beyond the ITRS as the future System-on-Chip Platform integrating new disruptive devices. The association of C-diamond with HiK as a combination for new functionalized Buried Insulators, for example, will bring new ways of improving short channel effects and suppress self-heating. That will allow new optimization of Ion-Ioff trade offs. The control of low power dissipation and short channel effects together with high performance will be the major challenges in the future.

In an attempt to realize tiny "knowledge vehicles" called intelligent quantum (IQ) chips for use in the coming ubiquitous network society, this paper presents the present status and future prospects of ultra-small-size and ultra-low-power III-V quantum logic large scale integrated circuits based on a novel hexagonal binary-decision diagram (BDD) quantum circuit architecture. Here, quantum transport in path switching node devices formed on III-V semiconductor-based hexagonal nanowire networks is controlled by nanometer scale Schottky wrap gates (WPGs) to realize arbitrary combinational logic function. Feasibility of the approach is shown through fabrication of basic node devices and various small-scale circuits, and approaches for higher density integration and larger scale circuits are discussed.

Nanoelectronics (including nanomagnetics and nanophotonics) generally refers to nanometer scale devices, and to circuits and architectures which are composed of these devices. Continued scaling of the devices into the nanometer range leads to enhanced information processing systems. Generally, this scaling has arisen from three major sources, one of which is reduction of the physical gate length of individual transistors. Until recently, this has also allowed an increase in the clock speed of the chip, but power considerations have halted this to levels around 4 GHz in Si. Indeed, there are indications that scaling itself may be finished by the end of this decade. Instead, there are now pushes to seek alternative materials for nano-devices that may supplement the Si CMOS in a manner that allows both higher speeds and lower power. In this paper, we will cover some of the impending limitations, and discuss some alternative approaches that may signal continued evolution of integrated circuits beyond the end of the decade.

The Kane concept of quantum computation using single phosphorus donors in silicon has revolutionized the way we think about P-doped silicon devices. However, because of the enormous effort required in fabricating such devices using single atom techniques, detailed modeling and assessment of fault-tolerant operation is required to determine and optimize the scalability, and indeed feasibility, of such a vision.

Multiplexers are extremely important parts of signal control systems. Some critical circuits of computing systems, like memories, use large multiplexers in order to present the value of a specific memory cell to their output. Several quantum-dot cellular automata (QCA) circuits have been designed and the need for a QCA memory access system becomes prominent. A modular 2ⁿ to 1 QCA multiplexer covering small area could reduce the size of such circuits and conclusively could increase circuit integration. In this paper we present a novel design of a small size, modular quantum-dot cellular automata (QCA) 2ⁿ to 1 multiplexer that can be used for memory addressing. The design objective is to develop a modular design methodology which can be used to implement 2ⁿ to 1 multiplexers using building blocks. For the QCA implementation a careful consideration is taken into account concerning the design in order to increase the circuit stability.

A systematic approach for designing Boolean logic gates is presented in this paper. A single array of Carbon nanotube field effect transistor (CNFET) capacitors is utilized as a voltage divider of input signals. Then, a special path, which is consisted of CNFETs with different threshold voltages, connects the proper voltage source to the output node for each voltage level. The main concept is illustrated with the concentration on 3-input functions. However, some other logic gates with higher number of input variables are also proposed within the paper. The sensitivity to diameter variation of CNTs is measured by applying Monte Carlo analysis. It is not needed to use Karnaugh map to simplify expressions and the designs structured with the new method, benefit from low transistor count and a fixed critical path regardless of the number of input variables in comparison with conventional and standard circuitry design methods. Several practical circuits are also deigned, which have the capability of working in low voltages.

Quantum-dot Cellular Automata (QCA) is an attractive nanoelectronics paradigm which is widely advocated as a possible replacement of conventional CMOS technology. Designing memory cells is a very interesting field of research in QCA domain. In this paper, we are going to propose novel nanotechnology-compatible designs based on the majority gate structures. In the first step, this objective is accomplished by QCA implementation of two well-organized JK flip-flop designs and in the second step; synchronous counters with different sizes are presented as an application. To evaluate functional correctness of the proposed designs and compare with state-of-the-art, QCADesigner tool is employed.

Very large-scale integrated circuit (VLSI) design faces many challenges with today’s nanometer CMOS technology, including leakage current and reliability issues. Magnetic tunnel junction (MTJ) hybrid with CMOS transistors can offer many advantages for future VLSI design such as high performance, low power consumption, easy integration with CMOS and also nonvolatility. However, MTJ-based logic circuits suffer from a reliability challenge that is the read disturbance issue. This paper proposes a new nonvolatile magnetic flip-flop (MFF) that offers a disturbance-free sensing and a low power write operation over the previous MFFs. This magnetic-based logic circuit is based on the previous two-in-one (TIO) MTJ cell that presents the aforementioned attributes. Radiation-induced single event upset, as another reliability challenge, is also taken into consideration for the MFFs and another MFF robust against radiation effects is suggested and evaluated.

Quantum-dot Cellular Automata (QCA) as a nanoscale transistor-less device technology offers distinguishing advantages over the limitations of CMOS circuits. This nanoelectronic is based on the mapping of binary logic in the two excess electrons configuration within a four-dot cell. In this paper, we propose a new ultra-low energy and low-complexity two-input XOR gate which can be employed as a basic component in designing a wide range of QCA logical circuits. For performance evaluation of the presented design in a large array of QCA structures, even parity generator circuit with different lengths up to 32 bits as well as LFSR circuit are designed and analyzed as instances of logical circuits. The simulation results reveal that our proposed designs have significant improvements in contrast to counterparts from hardware implementation requirements and energy consumption aspects. QCADesigner tool is utilized to evaluate functional correctness of the proposed circuits and power dissipation is evaluated using QCAPro simulator as an accurate power estimator tool.

The quantum-dot cellular automata technology has great attention in nanoscale digital circuits design due to its high-speed and high-dense. Shift registers play vital role in digital circuits design. So, efficient implementation of shift register circuits in this technology is in the focal point of researches in digital circuits design. In this study, new structures are proposed for the shift register circuits in single layer, three layers and five layers based on inherent quantum-dot cellular automata clock. The QCADesigner tool version 2.0.3 is employed for simulation and verification of functionality of the proposed structures for the serial-input-serial-output shift register circuits. The results demonstrate that the developed 3-bit, 4-bit and 5-bit coplanar shift register circuits require 32, 44 and 56 cells, respectively. The comparison results demonstrate that the developed circuits provide advantages compared to other circuits in terms of area, cell count, clock cycles and cost.

As the semiconductor industry strives for downsizing and high speed, it is confronted with increasing scaling uncertainty as devices decrease to the nanoscale. Nano-magnetic logic (NML) is an alternative approach to synthesize the digital logic circuits with high-density and low-power consumption. We introduced an optimal design of content addressable memory (CAM) memory based on perpendicular nano-magnetic logic (pNML). The main aim of this implementation is to synthesize CAM memory in terms of latency and other design parameters. The implementation of the design is a multilayer approach, which is optimal. The synthesis approach and optimization are perfectly scalable across layout construction of designs. Here a new logic gate in pNML technology is designed which is mainly used for matching of two input numbers. According to insight, both memory unit and a matching unit in the pNML are introduced in the state-of-the-artwork for the first time to synthesize design in high-speed pNML application. MAGCAD tool is used for the design of all the proposed pNML layouts.

We propose a novel semiconductor device in which electronic-analogue dendritic trees grow on multilayer single-electron circuits. A simple cellular-automaton circuit was designed for generating dendritic patterns by utilizing the physical properties of single-electron devices, i.e. quantum and thermal effects in tunneling junctions. We demonstrate typical operations of the proposed circuit through extensive numerical simulations.

We study the limiting behavior of a Schrödinger–Poisson system describing a three-dimensional quantum gas that is confined along the vertical z-direction in a fine slab. The starting point is the three-dimensional Schrödinger–Poisson system with Dirichlet conditions on two horizontal planes z = 0 and z = ε, where the small parameter ε is the scale width of the slab. The limit ε → 0 appears to be an infinite system of two-dimensional nonlinear Schrödinger equations. Our strategy combines a refined analysis of the Poisson kernel acting on strongly confined densities and a time-averaging process that allows us to deal with the fast time oscillations.

The error rate in a current-controlled logic microprocessor dominated by shot noise has been investigated. It is shown that the error rate increases very rapidly with increasing cutoff frequency. The maximum clock frequency of the processor, which works without errors, is obtained as a function of the operational current. The information channel capacity of the system is also studied.

With the development of microfabrication techniques and nanoscale science and technology, functional nanostructures and nanodevices have been the hot-points concerned by all scientific and technological circles. This paper presents a series of our efforts on making functional nanostructures for fabrication of nanodevices, especially for prototype single electron devices (SEDs). A necessary computer simulation for explaining the electrical properties of this prototype SED is also included.

The molecular nanoclusters proved to be very promising objects for applications in electronics not only because they have absolutely identical chemical structure and allow for bottom to top approach in constructing new electronic devices, but also for the possibility to design and create great variety of such clusters with specific properties. The formation and deposition of mixed Langmuir monolayers composed of inert amphiphile molecular matrix and guest ligand-stabilized metal-core nanoclusters are described. This approach allowed to obtain the ordered stable reproducible planar monolayer and multilayer nanocluster nanostructures on solid substrates. The use of novel polymeric Langmuir monolayers formed by amphiphilic polyelectrolytes and nanoclusters resulted in fabrication of ultimately thin monomolecular nanoscale-ordered stable planar polymeric nanocomposite films. The morphology and electron transport in fabricated nanostructures were studied experimentally using AFM and STM. The effects of single electron tunneling at room temperature through molecular cluster object containing finite number of localized states were theoretically investigated taking into account electron–electron Coulomb interaction. It is shown that tunnel current-bias voltage characteristic of such tunnel junction is characterized by a number of staircase steps equal to the number of cluster's eigenlevels, however the fronts of each steps are asymptotically linear with finite inclination. The analytically obtained current–voltage characteristics are in agreement with experimental results for electron tunneling through molecular nanoclusters at room temperatures.

In this research paper, we examined the effect of placing the elements of Group 0 as alligator clips with Anthracene molecule binding gold electrodes on the nanometer scale using Extended Huckle Theory (EHT) based semi-empirical model. The electron transport parameters i.e., I-V curves, Conductance-Voltage curves and transmission spectrum were investigated through Anthracene molecule by buffering it between two semi-infinite gold electrodes but via different alligator clips-Helium, Neon, Argon, Krypton, Xenon and Radon, all from Noble gas group or group-0 under finite bias voltages within Keldysh's nonequilibrium green function formalism (NEGF). The simulated results revealed that the Xenon and Radon showed maximum conduction whereas Krypton, Neon, Helium and Argon showed least. The maximum conductance of 0.62G₀ and 70.4 μA current was exhibited by Xenon and thus affirmed to be the most optimal alligator clip amongst noble gases at nanometre scale.

Scanning Tunneling Microscopy and Spectroscopy have been used in an attempt to elucidate the electronic structure of nanotube systems containing two constituent shells. Evidence for modified electronic structure due to the inter-layer interaction in double-walled carbon nanotubes is provided by the experimental tunneling spectra and the contribution of the inner tube to the local density of states of the "composite" double-walled system is identified in agreement with previous theoretical calculations. An explicit correlation between the chirality of the two constituent tubes, the inter-wall interaction and the overall electronic structure for double-walled carbon nanotubes, is demonstrated by our experiments, showing that the effect the inner tube has on the overall electronic structure of double-walled nanotubes cannot be neglected, and is key to the opto-electronic properties of the system. We postulate that previous analysis of the opto-electronic properties on multiple-walled carbon nanotubes based purely on the outer layer chirality of the tube needs significant modification based on new understanding brought forth with our analysis.