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In this paper, a digitally programmable OTA-based multi-standard receiver baseband chain is presented. The multi-standard receiver baseband chain consists of two programmable gain amplifiers (PGA1 and PGA2) and a fourth-order LPF. The receiver is suitable for Bluetooth/UMTS/DVB-H/WLAN standards. Three different programmable OTA architectures based on second generation current conveyors (CCIIs) and Current Division Networks (CDNs) are discussed. The programmable OTA with the lowest power consumption, moderate area and good linearity — better than -50 dB HD3 — is selected to realize the multi-standard baseband receiver chain. The power consumption of the receiver chain is 6 mW. The DC gain varies over a 68 dB range with 1 MHz to 13.6 MHz programmable bandwidth. The receiver baseband chain is realized using 90 nm CMOS technology model under ±0.5 V voltage supply.

This paper proposes compact hardware implementations of 64-bit NESSIE proposed MISTY1 block cipher for area constrained and low power ASIC applications. The architectures comprise only one round MISTY1 block cipher algorithm having optimized FO/FI function by re-utilizing S9/S7 substitution functions. A focus is also made on efficient logic implementations of S9 and S7 substitution functions using common sub-expression elimination (CSE) and parallel AND/XOR gates hierarchy. The proposed architecture 1 generates extended key with independent FI function and is suitable for MISTY1 8-rounds implementation. On the other hand, the proposed architecture 2 uses a single FO/FI function for both MISTY1 round function as well as extended key generation and can be employed for MISTY1 $n>8$ rounds. To analyze the performance and covered area for ASICs, Synopsys Design Complier, SMIC 0.18$\mu$m @ 1.8V is used. The hardware constituted 3041 and 2331 NAND gates achieving throughput of 171 and 166 Mbps for 8 rounds implementation of architectures 1 and 2, respectively. Comprehensive analysis of proposed designs is covered in this paper.

Voice and circuit switched data will be carried over IP networks in the wireline part of the future UMTS. The commonly used protocol suite for low-bitrate real-time traffic transmission in the Internet leads to large header overhead, i.e., to low utilization of the network resources by user data. Multiplexing packets of different flows into a single IP packet reduces this effect. We model packet tunneling and multiplexing with subsequent spacing in IP networks. We derive a discrete-time analysis based on a framework for solving Markov chains. The numerical results show the superiority of multiplexing schemes provided that parameters are set in an appropriate way since there are many performance tradeoffs that have substantial effect on the efficiency of the system.

The provision of high speed packet data services in an efficient way is probably the most important challenge for the Universal Mobile Telecommunications System (UMTS) since this can give an advantage over second generation systems. The efficiency depends mainly on the radio interface due to its great flexibility. It is of utmost importance to investigate the effect of different configurations on the system performance. In this paper we evaluate the performance of packet data services over downlink dedicated channels (DCH) by means of detailed simulations. Due to the traffic variability, Automatic Repeat reQuest (ARQ) mechanism and closed loop power control the system behavior is quite complex and not so easily predictable as with constant rate services such as voice. We study the effect of several parameters (spreading factor, code rate, channel setup delay, etc.) on the system capacity by means of the delay-throughput curves. We show that the setting of parameters may be critical for system capacity and stability. For this reason we propose a flow control mechanism which is able to guarantee stability and enable the system capacity to be almost independent of channel rates.