International Journal of High Speed Computing

The parallelization of a structurally inhomogeneous Metropolis Monte Carlo particle/ potential problem was studied in an application to solvent clusters. The program was ported to a small parallel-processor system consisting of five T800–20 transputers. Different topologies are discussed. The optimum topology depends on the size of the computational problem; for our problem size it is a modified tree structure. Benchmarks are given for a transputer farm, and compared with results obtained on various scalar and vector processors.

This paper uses a hierarchical transformation to re-interpret and restructure the fast adaptive composite grid method (FAC) and to provide a foundation for higher order extrapolation. Numerical experiments on model problems compare the performance characteristics of conventional multigrid and FAC both with and without extrapolation.

The paper reviews existing methods for generating discrete random variables and their suitability for vector processing. A new method for generating discrete random variables for use in vectorized Monte Carlo simulations is presented. The method uses the concept of importance sampling and generates random variables by employing uniform distribution to speed up the computation. The sampled random variables are subsequently adjusted so that unbiased estimates are obtained. The method preserves both the mean and variance of the original distribution. It is demonstrated that the method requires simpler coding and shorter execution time for both scalar and vector processing, when compared with other existing methods. The vectorization speedup of the method is demonstrated on an IBM 3090–180 machine with a vector facility.

The importance of circuit simulation in the design of VLSI circuits has channelised research work in the direction of finding methods to speedup this highly compute-intensive problem. On one hand, attempts have been made to find better algorithms and use faster hardware; and on the other hand, to use parallel architectures for accelerating the circuit simulation task. In this paper, we examine the various issues involved in parallelizing two well-known circuit simulation approaches – direct methods and relaxation methods. A number of parallel computer architectures which have been used for this purpose are also surveyed.

This paper considers a memory system which provides simultaneous accesses to several image points within a linesegment in a 2-dimensional image array. Image processing tasks such as line detection with Hough transform, rotation, or line accesses in an image array can benefit from the proposed memory system with a single processor such that the overall memory access time is reduced.