International Journal of High Speed Electronics and Systems

Maskless pendeo-epitaxy involves the lateral and vertical growth of cantilevered "wings" of material from the sidewalls of unmasked etched forms. Gallium Nitride films grown at 1020°C via metalorganic vapor phase epitaxy on GaN/AlN/6H-SiC(0001) substrates previously etched to form -oriented stripes exhibited similar vertical [0001] and lateral growth rates, as shown by cross-sectional scanning electron microscopy. Increasing the temperature increased the growth rate in the latter direction due to the higher thermal stability of the surface. The surface was atomically smooth under all growth conditions with a root mean square (RMS)=0.17 nm. High resolution X-ray diffraction and atomic force microscopy of the pendeo-epitaxial films confirmed transmission electron microscopy results regarding the significant reduction in dislocation density in the wings. This result is important for the properties of both optoelectronic and microelectronic devices fabricated in III-Nitride structures. Measurement of strain indicated that the wing material is crystallographically relaxed as evidenced by the increase in the c-axis lattice parameter and the upward shift of the E2 Raman line frequency. A strong D°X peak at 3.466 eV was also measured in the wing material. However, tilting of the wings of ≤0.15° occurred due to the tensile stresses in the stripes induced by the mismatch in the coefficients of thermal expansion between the GaN and the underlying substrate.

Gallium nitride films of increasing thickness have been grown on either AlN or AlGaN substrates. The state of stress of these biaxially stressed layers gradually changed from compression to tension with regard to both their average strain and their local strain along the [0001] growth direction. The components of both the compressive and tensile stresses are caused by the mismatch in lattice parameters between the GaN and the buffer layer and the mismatch in the coefficients of thermal expansion between GaN and SiC, respectively. The compressive stress is partially relieved within the first 20 nm in the GaN film grown on the AlN buffer layer. The relief of the remaining stress follows an exponential dependence on the thickness of the GaN layer with values for the characteristic decay length of 0.24 μm and 0.64 μm for the AlN and AlGaN buffer layer, respectively. The relaxation mechanism is discussed in terms of the formation of misfit dislocations via surface undulations.

The essential steps required to create thick GaN films and seed crystals for bulk crystal growth are described. These include the growth of low dislocation density GaN films by hydride vapor phase epitaxy and the separation of films from their growth substrates. Also addressed are issues of processing thin and thick films to create compliant layer substrates for thick film HVPE growth and chemical mechanical polishing methods to enhance surface morphology and remove material damage free. Growth of both gallium and nitrogen polar films is discussed with key issues identified regarding polarity inversion during growth and impurity incorporation along the -c growth direction. These are illustrated with examples that emphasize the growth of material with low threading dislocation density.

The cracking of GaN films and the associated cracking of substrates are described. The geometry, structure, and evolution of fracture demonstrate that GaN films crack under tensile stress during growth and are subsequently overgrown and partially healed. The film cracks channel along the (1010)_GaN planes and also extend a distance of ~5 μm into the sapphire substrate. These incipient cracks in the substrate form a set of initial flaws that leads to complete fracture through the sapphire during cooling for sufficiently thick films. Each stage of this cracking behavior is well described by a fracture mechanics model that delineates a series of critical thicknesses for the onset of cracking that are functions of the film and substrate stresses, thicknesses, and elastic properties. Similar cracking behavior is found to occur independently of the choice of substrate between sapphire and SiC and is traced to a tensile stress generation mechanism early in the growth process, such as that provided by island coalescence. Cracking is the dominant stress relief mechanism, as opposed to dislocation generation or diffusion, because of the island growth mode and because of optimized growth temperatures at or below the brittle-to-ductile transition. Lateral epitaxial overgrowth (LEO) of GaN is shown to minimize substrate fracture even though film cracking remains unaffected. This effect explained in terms of the limits placed on the initial extent of insipient substrate cracks due to the LEO geometry.

The direct bonding method is applied to the GaN/SiC system, and the processing conditions for successful direct bonding are clarified. Direct bonding of GaN/SiC is achieved at 900°C. The direct bonding of GaN to Si-face SiC is very dependent on the choice of chemical treatments but the bonding of GaN to C-face SiC is less dependent on surface preparation. It is found that an oxide-cleaned surface is essential to achieve good reproducibility of bonding. The electrical properties of the bonded interfaces are also characterized. If a native oxide is present when the bonded interface is prepared, the current through the interface is decreased, which is attributed to an energy barrier due to the presence of charged interface states. Cross section transmission electron microscopy indicates 10nm spaced dislocations at the interface, which form to accommodate the lattice mismatch and twist misfit. In some regions an amorphous oxide layer forms at the interface, which is attributed to inadequate surface preparation prior to bonding. Directly bonded GaN/SiC heterojunction diodes have been fabricated and characterized. The Ga-face (0001) n-type 2H GaN films were directly bonded to the Si-face or C-face (0001, 000-1) p-type 6H SiC. The I-V characteristics display diode ideality factors, saturation currents and energy barrier heights of 1.5±0.1, 10^-13A/cm², 0.75±0.10 eV for the Ga/Si interface and 1.2±0.1, 10^-16A/cm², 0.56±0.10 eV for the Ga/C interface. The built-in potential was determined from capacitance-voltage measurements to be 2.11±0.10 eV and 2.52±0.10 eV for the Ga/Si interface and the Ga/C interface, respectively. From the built-in potential the energy band offsets are determined to be ΔE_C=0.87±0.10 eV and ΔE_V=1.24±0.10 eV for the Ga/Si interface and ΔE_C=0.46±0.10 eV and ΔE_V=0.83±0.10 eV for the Ga/C interface.

The characteristics of clean n- and p-type GaN (0001) surfaces and the interface between this surface and SiO₂, Si₃N₄, and HfO₂ have been investigated. Layers of SiO₂, Si₃N₄, or HfO₂ were carefully deposited to limit the reaction between the film and clean GaN surfaces. After stepwise deposition, the electronic states were measured with x-ray photoelectron spectroscopy (XPS) and ultraviolet photoemission spectroscopy (UPS). A valence band offset (VBO) of 2.0±0.2 eV with a conduction band offset (CBO) of 3.6±0.2 eV was determined for the GaN/SiO₂ interface. The large band offsets suggest SiO₂ is an excellent candidate for passivation of GaN. For the GaN/Si₃N₄, interface, type II band alignment was observed with a VBO of -0.5±0.2 eV and a CBO of 2.4±0.2 eV. While Si₃N₄ should passivate n-type GaN surfaces, it may not be appropriate for p-type GaN surfaces. A VBO of 0.3±0.2 eV with a CBO of 2.1±0.2 eV was determined for the annealed GaN/HfO₂ interface. An instability was observed in the HfO₂ film, with energy bands shifting ~0.4 eV during a 650°C densification anneal. The electron affinity measurements via UPS were 3.0, 1.1, 1.8, and 2.9±0.1 eV for GaN, SiO₂, Si₃N₄, and HfO₂ surfaces, respectively. The deduced band alignments were compared to the predictions of the electron affinity model and deviations were attributed to a change of the interface dipole. Interface dipoles contributed 1.6, 1.1 and 2.0±0.2 eV to the band alignment of the GaN/SiO₂, GaN/Si₃N₄, and GaN/HfO₂ interfaces, respectively. It was noted that the existence of Ga-O bonding at the heterojunction could significantly affect the interface dipole, and consequently the band alignment in relation to the GaN.

We analyze steady-state and transient electron transport in the group III-nitride materials at high and ultra-high electric fields for different electron concentration regimes. At high electron concentrations where the electron distribution function assumes a shifted Maxwellian, we investigate different time-dependent transient transport regimes through the phase-plane anyalysis. Unexpected electron heating pattern is observed during the velocity overshoot process with a moderate electron temperature near the peak velocity followed by rapid increase in the deceleration period. For short nitride diodes, space-charge limited transport is considered by taking into account the self-consistent field. In this case, the overshoot is weaker and the electron heating in the region of the peak velocity is greater than that found for time-dependent problem. The transient processes are extended to sufficiently larger distances as well. When the electron concentration is small, we propose a model which accounts the main features of injected electrons in a short device with high fields. The electron velocity distribution over the device is found as a function of the field. It is demonstrated that in high fields the electrons are characterized by the extreme distribution function with the population inversion.

The energy distribution of electrons transported through intrinsic AlN was directly measured as a function of applied field and AlN film thickness. The electron energy distribution featured kinetic energies higher than that of completely thermalized electrons. Transport through films thicker than 95 nm at an applied field between 200 kV/cm and 350 kV/cm occurred as steady-state hot electron transport following a Maxwellian energy distribution with a characteristic carrier temperature. At higher fields (470 kV/cm), intervalley scattering was evidenced by a multi-component energy distribution featuring a second peak at the energy position of the first satellite valley. Velocity overshoot was observed in films thinner than 95 nm and at fields greater than 510 kV/cm. In this case, a symmetric energy distribution centered at an energy above the conduction band minimum was measured, indicating that the drift component of the electron velocity was on the order of the "thermal" component. A transient transport length of less than 80 nm was deduced from these observations.

AlGaN thin films and Schottky barrier Al_0.4Ga_0.6N diodes exhibit generation-recombination (GR) noise with activation energies of 0.8 - 1 eV. GR noise in AlGaN/GaN Heterostructure Field Effect transistors (HFETs) corresponds to activation energies in the range from 1 - 3 meV to 1 eV. No GR noise is observed in thin doped GaN films and GaN MESFETs. GR noise with the largest reported activation energy of 1.6 eV was measured in AlGaN/InGaN/GaN Double Heterostructure Field Effect Transistors (DHFETs). Local levels responsible for the GR noise in HFETs and DHFETs might be located in AlGaN barrier layers.

Unique materials properties of GaN-based semiconductors that make them promising for high-power high-temperature applications are high electron mobility and saturation velocity, high sheet carrier concentration at heterojunction interfaces, high breakdown field, and low thermal impedance (when grown over SiC or bulk AlN substrates). The chemical inertness of nitrides is another key property. An AlGaN/GaN Heterostructure Field Effect Transistor (HFET) has been a topic of intensive investigations since the first report in 1991 [1]. Several groups demonstrated high power operation of AlGaN/GaN HFETs at microwave frequencies [2,3,4], including a 100 W output power single chip amplifier developed by Cree, Inc. and devices with 100 GHz cut-off frequency reported in [5]. However, in spite of impressive achievements, the potential of nitride based HFETs has not been fully realized as yet. The RF powers expected from the fundamental properties of nitride based materials significantly exceed the experimental data. One of the key problems limiting the HFETs RF characteristics is high gate leakage currents causing DC and RF parameter degradation. When the gate voltage goes positive the forward leakage current shunts the gate-channel capacitance and thus limits the maximum device current. When the gate voltage is negative, high voltage drop between the gate and the drain causes premature breakdown and thus limits maximum applied drain voltage. In addition, gate leakage currents increase the device sub-threshold currents, which decrease the achievable amplitude of the RF output. These limitations become even more severe at high ambient temperatures. The characteristics of III-N HFETs can be considerably improved by implementing a new approach, which results from the demonstration of good quality of SiO₂/AlGaN and Si₃N₄/AlGaN interfaces. This approach opens up a way to fabricate insulated gate heterostructure field-effect transistors (IGHFETs), which have the gate leakage currents several orders of magnitude below those of regular HFETs, and exhibit better linearity and higher channel saturation currents. In this chapter, we describe design, characterization and applications of these novel devices.

The use of AlGaN/GaN HEMTs and HBTs for switching power supplies is explored. With its high electron velocities and breakdown fields, GaN has great potential for power switching. The field-plate HEMT increased breakdown voltages by 20% to 570V by reducing the peak field at the drain-side edge of the gate. The use of a gate insulator is also investigated, using both JVD SiO₂ and e-beam evaporated SiO₂ to reduce gate leakage, increasing breakdown voltages to 1050V and 1300V respectively. The power device figure of merit (FOM) for these devices: , is the highest reported for switching devices. To reduce trapping effects, reactively sputtered SiN_x, is used as a passivant, resulting in a switching time of less than 30 ns for devices blocking over 110V with a drain current of 1.4A under resistive load conditions. Dynamic load results are also presented.

The development of HBTs for switching applications included the development of an etched emitter HBT with a selectively regrown extrinsic base. This was later improved upon with the selectively regrown emitter devices with current gains as high as 15. To improve breakdown in these devices, thick GaN layers were grown, reducing threading dislocation densities in the active layers. A further improvement included the use of a bevelled shallow etch and a lateral collector design to maximize device breakdown.

We describe the fabrication of the CAVET (Current Aperture Vertical Electron Transistor) by Photoelectrochemical (PEC) formation of a current aperture. Etch process is quite naturally critical to the achievement of the etched aperture in CAVET. We provide some background on that etch process, and the subsequent modification and optimization of the process for CAVET fabrication.

We discuss the first reported device characteristics of a wafer-fused heterojunction bipolar transistor (HBT), demonstrating the potential of wafer fusion for the production of electrically active heterostructures between lattice-mismatched materials. n-GaAs/n-GaN ("n-n") and p-GaAs/n-GaN ("p-n") heterojunctions were successfully fused and processed into current-voltage (I-V) test structures. The fusion and characterization of these simple structures provided insight for the fabrication of the more complicated HBT structures. Initial HBT devices performed with promising dc common-emitter I-V characteristics and Gummel plots. n-n, p-n, and HBT electrical performance was correlated with systematically varied fusion conditions, and with the quality of the fused interface, given both chemical information provided by secondary ion mass spectroscopy (SIMS) and structural information from high resolution transmission electron microscopy (HRTEM) analysis.