Frontiers in Electronics

The following sections are included:

• Preface
• Contents

State-of-the-Art devices are approaching to the performance limit of traditional MOSFET as the critical dimensions are shrunk. Ultrathin fully depleted Silicon-on-Insulator transistors and multi-gate devices based on SOI technology are the best candidates to become a standard solution to overcome the problems arising from such aggressive scaling. Moreover, the flexibility of SOI wafers and processes allows the use of different channel materials, substrate orientations and layer thicknesses to enhance the performance of CMOS circuits. From the point of view of simulation, these devices pose a significant challenge. Simulations tools have to include quantum effects in the whole structure to correctly describe the behavior of these devices. The Multi-Subband Monte Carlo (MSB-MC) approach constitutes today's most accurate method for the study of nanodevices with important applications to SOI devices. After reviewing the main basis of MSB-MC method, we have applied it to answer important questions which remain open regarding ultimate SOI devices. In the first part of the chapter we present a thorough study of the impact of different Buried OXide (BOX) configurations on the scaling of extremely thin fully depleted SOI devices using a Multi-Subband Ensemble Monte Carlo simulator (MS-EMC). Standard thick BOX, ultra thin BOX (UTBOX) and UTBOX with ground plane (UTBOX+GP) solutions have been considered in order to check their influence on short channel effects (SCEs). The simulations show that the main limiting factor for downscaling is the DIBL and the UTBOX+GP configuration is the only valid one to downscale SGSOI transistors beyond 20 nm channel length keeping the silicon slab thickness above the theoretical limit of 5 nm, where thickness variability and mobility reduction would play an important role. In the second part, we have used the multisubband Ensemble Monte Carlo simulator to study the electron transport in ultrashort DGSOI devices with different confinement and transport directions. Our simulation results show that transport effective mass, and subband redistribution are the main factors that affect drift and scattering processes and, therefore, the general performance of DGSOI devices when orientation is changed

The quasi-ballistic nature of transport in end of the roadmap MOSFETs device is expected to lead to significant on state current enhancement. The current understanding of such mechanism of transport is carefully reviewed in this chapter, underlining the derivation and limits of corresponding analytical models. In a second part, different strategies to compare these models to experiments are discussed, trying to estimate the “degree of ballisticity” achieved in advanced technologies.

Various physics based modeling schemes for multigate MOSFETs are presented. In all cases, the models are derived from an analysis of the device body electrostatics in terms of two- or three- dimensional Laplace's and Poisson's equations, where short-channel and scaling effects are implicitly accounted for. Thus a comprehensive modeling framework is derived for the subthreshold electrostatics of double-gate MOSFETs based on a conformal mapping analysis of the potential distribution in the device body arising from the inter-electrode capacitive coupling. This technique is also applied to the circular gate-all-around MOSFET by utilizing the symmetry properties of this device. For both these devices, the modeling is extended to include the strong inversion regime by a self-consistent procedure that simultaneously allows the calculation of the quasi-Fermi potential distribution, the drain current, and the intrinsic capacitances. In an alternative modeling framework, covering a wide range of multigate devices in a unified manner, the potential distribution is derived from a select set of isomorphic trial functions that reflect the geometry and symmetry properties of the devices. Modeling parameters used are self-consistently determined by imposing boundary conditions associated with Laplace's or Poisson's equation. Finally, the effects of quantum mechanical confinement are discussed for ultra thin body devices. The results of the modeling are in excellent agreement with numerical simulations.

This chapter presents some insights into the modeling of different Multi-Gate SOI MOSFET structures, and in particular Double-Gate MOSFETs (DG MOSFETs) and Tri-Gate MOSFETs (TGFETs). For long-channel case an electrostatic model can be developed from the solution of the 1D Poisson's equation (in the case of DG MOSFETs) and the 2D Poisson's equation in the section perpendicular to the channel (in the case of TGFETs). Allowing it to be incorporated in quasi-2D compact models. For short-channel devices a model can be derived from a 2D (in the case of DG MOSFETs) or a 3D (in the case of TGFETs) electrostatic analysis. The models were successfully compared with 2D and 3D TCAD simulations and, in some cases, experimental measurements. Short-channel effects, such as subthrehold slope degradation, threshold voltage roll-off and DIBL were accurately reproduced.

The following section is included:

• Author Index