νMOS Cellular-Automaton Circuit for Picture Processing

This chapter proposes a design of cell circuits for implementing cellular-automaton devices that perform morphological picture processing. To produce the morphological processing, we present the idea of using the silicon functional device, νMOS FET. We designed sample cell circuits for several morphological processing (noise cleaning, edge detection, thinning and shrinking in an image). A low dissipation of about 10 µW per νMOS FET threshold logic circuits can be expected at 1 MHz operation; therefore, 10⁵ or more cells that operate in parallel can be integrated into an LSI.