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Self-sustained electromechanical transducers are generally built using coupled oscillators made of Van Der Pol and Duffing. In this paper, the complex dynamics of a Van Der Pol oscillator coupled with the Duffing (VDPCD) oscillator through the velocity is investigated. By exploiting nonlinear analysis techniques, several nonlinear phenomena uncovered in such types of systems are found. Among others, we have broken symmetry inducing multistability in the coupled oscillators, the phenomenon of coexisting bubble bifurcations. By employing Helmholtz’s theorem, a Hamilton energy function for the coupled model was derived. Furthermore, the famous theory of the linear augmentation method, based on the unstable equilibria of the uncontrolled model, is exploited to control the multistability of the coupled oscillators toward a regulator or a chaotic regime. A PSpice circuit was used to perform a circuit experiment, from which the results of the multistability exhibited by the coupled oscillators were further supported. At last, a microcontroller board-based experimental circuit was constructed, and the findings were corroborated by the results of the study.

Discrete chaotic systems in simple algebraic forms show great potential in many fields due to their complex dynamics and coexisting behaviors. Recently, an analog circuit scheme for implementing discrete systems has been proposed, but this scheme cannot exhibit essential coexisting behaviors in discrete systems. To address this issue, this paper proposes a novel analog circuit scheme for experimentally observing the coexisting behaviors in discrete systems. A discrete memristor model and two discrete chaotic maps are taken as examples, and their analog circuits are designed and physically implemented. By appropriately setting the initial values, the pinched hysteresis loops related to the initial values of the discrete memristor model, the coexisting attractors of the discrete memristor map and the initial-offset-control coexisting behaviors of the discrete neuron model are simulated, respectively. In particular, the printed circuit board based on trigonometric chip, sample-and-hold device, operational amplifier chip, and other components is fabricated. The coexisting behaviors are observed experimentally, thus verifying the numerical simulations and circuit simulations. The proposed scheme provides a new framework for the physical realization of discrete systems.

The paper proposes a fault diagnosis model based on the HIWO–SVM algorithm given the fact that the basic support vector machines (SVM) cannot solve effectively the problem of fault diagnosis in analog circuit. First of all, the wavelet package technique is adopted for extracting the information of the faults from the test points in the analog circuit. The differential evolution (DE) algorithm is then integrated with the purpose of improving the performance of the basic IWO algorithm, i.e. a hybrid IWO (HIWO) algorithm. The HIWO algorithm is further used to optimize the parameters of SVM in order to avoid the randomness of the parameter selection, thereby improving the diagnosis precision and robustness. The experimental results on a filter circuit show that the method is more effective and reliable than the other methods for fault diagnosis.

This paper proposes several improved CMOS analog integrated circuits for fuzzy inference system as the general modules, including voltage-mode implementations of minimization circuit, programmable Gaussian-like membership function circuit, and centroid algorithm normalization circuit without using division. A two-input/one-output fuzzy system composed of these circuits is implemented and testified as a nonlinear function approximator. HSPICE simulation results show that the proposed circuits provide characteristics of high operation capacity, simple inference, low power dissipation, and high precision.

This paper presents a low power CMOS analog integrated circuit of a Takagi–Sugeno fuzzy logic controller with voltage/voltage interface, small chip area, relatively high accuracy and medium speed, which is composed of several improved functional blocks. Z-shaped, Gaussian and S-shaped membership function circuits with compact structures are designed, performing well with low power, high speed and small areas. A current minimization circuit is provided with high accuracy and high speed. A follower-aggregation defuzzification block composed of several multipliers for center of gravity (COG) defuzzification is presented without using a division circuit. Based on these blocks, a two-input one-output singleton fuzzy controller with nine rules is designed under a CMOS 0.6 μm standard technology provided by CSMC. HSPICE simulation results show that this controller reaches an accuracy of ±3% with power consumption of only 3.5 mW (at ±2.5 V). The speed of this controller goes up to 0.625M Fuzzy Logic Inference per Second (FLIPS), which is fast enough for real-time control.

In order to solve the most important problem of the fractional calculus (FC) application, the realization of analog circuit of fractance, continued fraction theory is applied to design the -1/2ⁿ order analog fractance approximation circuit. The author presents a network function of ideal fractance and decomposes it in continued fractions (CFs) form to obtain the corresponding analog fractance approximation circuit. The new circuit consists of ordinary passive RC component through network synthesis method. Simulations are performed for the verification of the new circuit. Experimental evidence has proved that the performance of novel -1/2ⁿ order analog fractance approximation circuit is good in both amplitude-frequency response and phase-frequency response.

High performance of fully differential operational transconductance amplifier is designed and implemented using a 0.18-μm CMOS process. The implemented op-amp uses common mode feedback (CMFB) circuit operating in weak inversion region which does not affect other electrical characteristics due to eliminating common mode (CM) levels automatically leading to improve CM rejection ratio (CMRR) of the amplifier significantly. Moreover, the output stage has class-AB operation so that its current can be made larger due to increasing the output current dynamically using adaptive biasing circuit. Additionally, the AC currents of the active loads have been significantly reduced using negative impedances to increase the gain of the amplifier. The results show the GBW 2.3 MHz, slew rate 2.6 V/μs and 1% settling time 150 ns with a capacitive load of 15 pF. This amplifier dissipates only 6.2 μW from a 1.2 V power supply.

This paper presents a voltage-mode (VM) tunable all-pass section, employing a grounded capacitor and a newly introduced current conveyor with an extra X stage. The proposed all-pass filter uses grounded capacitor as the only passive component and benefits from high input and low output impedance. The proposed circuit exhibits eight performance features without trade-offs, as compared to carefully chosen 25 published works. The functionality of the proposed element is verified through PSPICE simulation using 0.25-μm process parameters. An application of second order is also incorporated.

This paper presents a new electronically tunable voltage-mode universal filter with four-input one-output employing six simple operational transconductance amplifiers (OTAs), two grounded capacitors and two MOS resistors. The use of grounded passive components is beneficial for integrated circuit implementation. The proposed filter can realize low-pass, band-pass, high-pass, band-stop and all-pass filtering functions without active and passive component-matching conditions and inverting-type input signals requirements. The natural frequency and quality factor can be tuned independently and electronically by adjusting the bias currents. The voltage-mode filter offers the features of high-input impedance and low active and passive sensitivities. The characteristics of the proposed universal filter are verified using PSPICE simulators through 0.35$\mu$m CMOS process. Experimental results are used to confirm the workability of proposed circuit through LM13600 commercially available OTAs. Also a digitally programmable filter is shown to confirm the advantage of multiple-input universal filter.

This paper proposes a new method to increase the quality factor of the shadow bandpass filter. The proposed circuit topology is simple, with the use of conventional biquad cell along with external amplifiers. The major advantageous feature is that the quality factor of the filter is boosted up whereas the gain of the external amplifier is significantly reduced. Moreover, the presented idea can be applied to the shadow filter in both current and voltage modes. The proposed scheme is justified via circuit performance. The performance is compared with the previous research works in the same arena. The results show that a feedback signal and a properly chosen gain incredibly boost up the quality factor of the shadow bandpass filter. Simulations by PSpice using 0.18-$\mu$m CMOS-level parameters confirm the validity of the proposed work.

A simple circuit based on modified extra-X second-generation current conveyor (MEXCCII), which is capable of realizing the following grounded immittance functions: a lossless capacitor, a lossy capacitor, a lossy inductor and a lossy frequency-dependent negative conductance, is introduced in this paper. The circuit employs one MEXCCII and three passive components. The use of single active block makes the circuit structure simpler. No component’s matching constraint is needed in the proposed circuit. The nonideal study of the proposed grounded immittance circuit is also included. The circuit’s performance is examined using 0.18-$\mu$m technology-based PSPICE simulations. Experimental results which are performed using off-the-shelf integrated circuits (ICs) and bread board are also included. The proposed circuit is negligibly affected by the temperature variation and process variation. A single pole high-pass filter as an application of the realized lossy capacitor and a band-pass filter as an application of the realized lossy inductor are also presented in this paper. The realized filters offer the feature of ease of cascadability.

This paper presents a Schmitt trigger (ST) circuit with anti-clockwise hysteresis and its utility as an adjustable square/triangular wave generator. The ST circuit employs a single dual-X second-generation current conveyor and two resistors. The threshold voltages of the circuit are adjustable such that it can also function as a zero crossing detector. The circuit has a wide operational frequency range and also consumes low power. Without using an additional active block, a square/triangular wave generator circuit is also realized within the same circuit topology. The generator circuit uses a single active element, one grounded resistor and one grounded capacitor only. The use of grounded passive components makes the proposed generator circuit easily integrable. Additionally, the generator circuit is adjustable as its duty cycle is tunable by means of an external current source. The generator circuit also has a wide operational frequency range from 2.1 Hz to 19.2 MHz. The theoretical aspects of the proposed circuits are validated via Cadence simulations. Additionally, a prototype of DXCCII, which is implemented by using current feedback operational amplifier ICs AD844, is used to verify the ST experimentally.

First-order allpass filters are analog filters with a unit magnitude response, but they change the phase shift between input and output signals at various frequencies. This paper presents the transadmittance-mode first-order allpass filters based on the modified current-controlled current differencing transconductance amplifier (M-CCCDTA). The proposed filters utilize a single M-CCCDTA and a grounded capacitor with no external resistors, making them well suited for implementation in an integrated circuit. The gain and phase response of the proposed filters can be adjusted electronically and separately. Also, the high output impedance of the proposed filters at both the input voltage node and the output current node makes cascading easy without the need for buffer devices. A quadrature sinusoidal oscillator based on the proposed first-order allpass filter has been designed as an example of an application. The PSpice simulation and actual experiments are utilized to validate the functionality of the proposed filters. The simulation and experimental results are consistent with the idea of anticipation.

We present an analog circuit implementation of the novel partial control method, that is able to sustain chaotic transient dynamics. The electronic circuit simulates the dynamics of the one-dimensional slope-three tent map, for which the trajectories diverge to infinity for nearly all the initial conditions after behaving chaotically for a while. This is due to the existence of a nonattractive chaotic set: a chaotic saddle. The partial control allows one to keep the trajectories close to the chaotic saddle, even if the control applied is smaller than the effect of the applied noise, introduced into the system. Furthermore, we also show here that similar results can be implemented on a circuit that simulates a horseshoe-like map, which is a simple extension of the previous one. This encouraging result validates the theory and opens new perspectives for the application of this technique to systems with higher dimensions and continuous time dynamics.

In this study, a new 3D chaotic system was first transformed into a Kolmogorov-type system to describe the vector field from the viewpoint of torque. In this Kolmogorov-type system, only inertial torque and non-Rayleigh dissipation exist. Thus, this is different from previously reported Kolmogorov-type systems that are generally decomposed into inertial torque, internal torque, dissipation, and external torque. Moreover, by analyzing these two torques, the physical background of the system and the key factors of chaos generation were also determined. That is, the inertial torque and non-Rayleigh dissipation are responsible for chaos generation in the new 3D chaotic system. Then, the Casimir function and Hamiltonian energy function were also analyzed to investigate the cycling of energy in the chaotic system. Finally, both an analog circuit and a Field Programmable Gate Array (FPGA) circuit were designed to implement the chaotic system. All of the experimentally obtained results are consistent with the results of numerical analysis, which did not only indicate the chaotic characteristics of the 3D chaotic system physically, but also provided physical models for engineering applications.

The nonlinear dynamics of an underdamped sinusoidal potential system is experimentally and numerically studied. The system shows regular (nonchaotic) periodic motion when driven by a small amplitude ($F_1$) sinusoidal force (frequency $\omega =\frac{2\pi }{\tau }$). However, when the system is driven by a similarly small amplitude biharmonic force (frequencies $\omega$ and $\frac{\omega }{2}$ with amplitudes $F_1$ and $F_2$, respectively) chaotic motion appear as a function of amplitude ($F_2$) of the $\frac{\omega }{2}$-frequency component for a fixed $F_1\approx 0.22$. We investigate the effect of an additional constant force $\mathrm{\Delta }F$ on the dynamics of the system in the ($F_2-\mathrm{\Delta }F$) space. We find that $\mathrm{\Delta }F$ can cause chaotic motion to move to regular motion and regular motion can also become chaotic in certain ($F_2-\mathrm{\Delta }F$) domains.

In this paper, the effects of a bias term modeling a constant excitation force on the dynamics of an infinite-equilibrium chaotic system without linear terms are investigated. As a result, it is found that the bias term reduces the number of equilibrium points (transition from infinite-equilibria to only two equilibria) and breaks the symmetry of the model. The nonlinear behavior of the system is highlighted in terms of bifurcation diagrams, maximal Lyapunov exponent plots, phase portraits, and basins of attraction. Some interesting phenomena are found including, for instance, hysteretic dynamics, multistability, and coexisting bifurcation branches when monitoring the system parameters and the bias term. Also, we demonstrate that it is possible to control the offset and amplitude of the chaotic signals generated. Compared to some few cases previously reported on systems without linear terms, the plethora of behaviors found in this work represents a unique contribution in comparison with such type of systems. A suitable analog circuit is designed and used to support the theoretical analysis via a series of Pspice simulations.

In dynamical systems, events that deviate significantly from usual or expected behavior are referred to as extreme events. This paper investigates the mechanism of extreme event generation in a 3D jerk system based on a generalized memristive device. In addition, regions of coexisting parallel bifurcation branches are explored as a way of investigating the multistability of the memristive system. The system is examined using bifurcation diagrams, Lyapunov exponents, time series, probability density functions of events, and inter-event intervals. It is found that extreme events occur via a period-doubling route and are due to an interior crisis that manifests itself as a sudden shift from low-amplitude to high-amplitude oscillations. Multistability is also identified when both control parameters and initial values are modified. Finally, an analog circuit based on the memristive jerk system is designed and experimentally realized. To our knowledge, this is the first time that extreme events have been reported in a memristive jerk system in particular and in jerk systems in general.

This chapter proposes a design of cell circuits for implementing cellular-automaton devices that perform morphological picture processing. To produce the morphological processing, we present the idea of using the silicon functional device, νMOS FET. We designed sample cell circuits for several morphological processing (noise cleaning, edge detection, thinning and shrinking in an image). A low dissipation of about 10 µW per νMOS FET threshold logic circuits can be expected at 1 MHz operation; therefore, 10⁵ or more cells that operate in parallel can be integrated into an LSI.

Recent theoretical investigations with Toda oscillator and the Lorenzs paradigm of chaotic systems demonstrate that the periodic perturbation may be successful in such complex stochastic multistable scenario. These features have found robust foundation from further experimental validations with an analog circuit of Lorenz equations, individually driven by white Gaussian noise and pink noise.