Design of CNFET full adder with mirror structure

In the last 50 years, the feature size of the fabrication process for integrated circuits has continuously shrunk, corroborating Moore's Law that the feature size will be halved every 18 months. Recently, however, the problems caused by highly integrated CMOS devices such as large leakage current, high temperature when operating and high energy consumption became a huge barrier impeding the development of integrated circuits. In 1998, CNFET was proposed, and its good electrical characteristics attracted a lot of attention. CNFET is the best potential device to replace traditional CMOS devices. In this paper, a CNFET based full adder with mirror structure was thus proposed, and a comparison between CNFET full adder and conventional CMOS full adder was made.