No Access

Fabrication of Multi-Bit SRAMs Using Quantum Dot Channel (QDC)-Quantum Dot Gate (QDG) FET

Department of Electrical and Computer Engineering, University of Connecticut, 371 Fairfield Way, Unit 4157, Storrs, CT 06268, USA

Search for more papers by this author

Jacques Goosen

Department of Electrical and Computer Engineering, University of Connecticut, 371 Fairfield Way, Unit 4157, Storrs, CT 06268, USA

Search for more papers by this author

Tao Liu

Department of Electrical and Computer Engineering, University of Connecticut, 371 Fairfield Way, Unit 4157, Storrs, CT 06268, USA

Search for more papers by this author

Hunter Bradley

Department of Electrical and Computer Engineering, University of Connecticut, 371 Fairfield Way, Unit 4157, Storrs, CT 06268, USA

Search for more papers by this author

Elisa Parent

Department of Electrical and Computer Engineering, University of Connecticut, 371 Fairfield Way, Unit 4157, Storrs, CT 06268, USA

Search for more papers by this author

Abdulmajeed Almalki

Department of Electrical and Computer Engineering, University of Connecticut, 371 Fairfield Way, Unit 4157, Storrs, CT 06268, USA

Search for more papers by this author

Erik Perez

Department of Electrical and Computer Engineering, University of Connecticut, 371 Fairfield Way, Unit 4157, Storrs, CT 06268, USA

Search for more papers by this author

, and

Faquir Jain

Department of Electrical and Computer Engineering, University of Connecticut, 371 Fairfield Way, Unit 4157, Storrs, CT 06268, USA

E-mail Address: faquir.jain@uconn.edu

Corresponding author.

Search for more papers by this author

https://doi.org/10.1142/S0129156423500179Cited by:0 (Source: Crossref)

This article is part of the issue:

Special Issue on Nanotechnology in Electronics, Photonics, Biosensors, and Energy Systems
Guest Editors: F. Jain, C. Broadbridge, M. Gherasimova and H. Tang

Abstract

This paper presents fabrication of multi-state inverters incorporating SiO_x-cladded Si quantum dot in the channel and gate region of driver, load, and access transistors. Experimental characteristics are presented exhibiting 3-state behavior in Quantum-dot Channel (QDC)-Quantum-dot Gate (QDG) FETs having Si quantum dots. It is shown that QDC-QDG-FETs-based enhancement mode inverter configurations are the building blocks of a multi-bit static random access memory (SRAM). QDC-QDG-FETs exhibiting four states can also be used to implement compact 4-state logic and nonvolatile memories or random access nonvolatile memories.

Keywords:

Remember to check out the Most Cited Articles!
Check out these Notable Titles in Antennas

References

1. F. C. Jain, E. Heller, S. Karmakar, and J. Chandy, Device and circuit modeling using novel 3-state quantum dot gate FETs, 2007 International Semiconductor Device Research Symposium, 2007, pp. 1–2. Crossref, Google Scholar
2. M. Lingalugari, K. Baskar, P.-Y. Chan, P. Dufilie, E. Suarez, J. Chandy, E. Heller, and F.C. Jain, Novel multi-state quantum dot gate FETs using SiO2 and lattice-matched ZnS-ZnMgSZnS as gate insulators, Journal of Electronic Materials, 42 (11), 3156–3163 (2013). Crossref, Web of Science, Google Scholar
3. P.-Y. Chan, M. Lingalugari, E. Heller, and F. Jain, An investigation on quantum dot superlattice (QDSL) diode, International Journal of High Speed Electronics and Systems, 23 (01n02), 1420004 (2014). Link, Google Scholar
4. F. Jain, R. Gudlavalleti, R. Mays, B. Saman, P.-Y. Chan, J. Chandy, M. Lingalugari, and E. Heller, Quantum dot channel FETs harnessing mini-energy band transitions in GeOx-Ge and Si QDSL for multi-bit computing, International Journal of High Speed Electronics and Systems, 31 (01n04), 2240012 (2022). Link, Google Scholar