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Compact, Programmable, Two-Stage Configuration for Implantable Biopotential Recording Amplifiers

Mohammad Hossein Maghami

http://orcid.org/0000-0002-7932-9161

Faculty of Electrical Engineering, Shahid Rajaee Teacher Training University, Tehran, Iran

E-mail Address: mhmaghami@sru.ac.ir

E-mail Address: mhmaghami@srttu.edu

Corresponding author.

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and

Amir Masoud Sodagar

Department of Electrical Engineering and Computer Science and Engineering, York University, Toronto, ON, Canada M3J 1P3, Canada

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https://doi.org/10.1142/S0218126619200093Cited by:4 (Source: Crossref)

Abstract

This paper proposes an area-efficient CMOS amplifier for neural recording applications. The proposed neural amplifier takes advantage of indirect negative feedback to realize a rather low upper $-$ 3-dB cutoff frequency. As a result, the capacitance needed to realize the cutoff frequency is so small that can be easily implemented on-chip. Moreover, the proposed circuit also employs attenuators in the same feedback loop in order to further reduce the silicon area consumed by the capacitors and at the same time to increase the input impedance of the circuit. Designed based on a two-stage configuration, the amplifier provides tunable lower cutoff frequency and digitally-programmable upper cutoff frequency and voltage gain. The circuit is designed in a 0.18- $μ$ m technology, and consumes 0.022mm² and 0.27mm² of chip areas for single- and eight-channel designs, respectively. Operated with a supply voltage of 1.8V, power consumption of the proposed amplifier is 36.7 $μ$ W with the simulated input-referred noise of 4 $μ V_{rms}$ over 1Hz–10kHz for each channel. The amplifier also provides an output swing of 0.95 V_pp with a total harmonic distortion of $-$ 50dB at the frequency of 1kHz.

This paper was recommended by Regional Editor Emre Salman.

Keywords:

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