Narrow Results

This chapter presents some insights into the modeling of different Multi-Gate SOI MOSFET structures, and in particular Double-Gate MOSFETs (DG MOSFETs) and Tri-Gate MOSFETs (TGFETs). For long-channel case an electrostatic model can be developed from the solution of the 1D Poisson's equation (in the case of DG MOSFETs) and the 2D Poisson's equation in the section perpendicular to the channel (in the case of TGFETs). Allowing it to be incorporated in quasi-2D compact models. For short-channel devices a model can be derived from a 2D (in the case of DG MOSFETs) or a 3D (in the case of TGFETs) electrostatic analysis. The models were successfully compared with 2D and 3D TCAD simulations and, in some cases, experimental measurements. Short-channel effects, such as subthrehold slope degradation, threshold voltage roll-off and DIBL were accurately reproduced.

Full adder is the basic block of arithmetic circuit found in microcontroller and microprocessor inside arithmetic and logic unit (ALU). Improving the performance of the adder is essential for upgrading the performance of digital electronics circuit where adder is employed. In this paper, a single bit full adder circuit has been designed with the help of double gate (MOSFET), the used parameters value has been varied significantly for improving the performance of full adder circuit. Double gate transistor circuit considers as a promising candidate for low power application domain as well as used in radio frequency (RF) devices. Multi-threshold CMOS (MTCMOS) is the most used circuit technique to reduce the leakage current in idle circuit. In this paper, different parameters are analyzed on MTCMOS Technique. MTCMOS technique achieves 99.6% reduction of leakage current, active power is reduced by 42.64% and delay is reduced by 71.9% as compared with conventional double gate 14T full adder. Simulation results of double gate full adder have been performed on cadence virtuoso tool with 45 nm technology.

This chapter presents some insights into the modeling of different Multi-Gate SOI MOSFET structures, and in particular Double-Gate MOSFETs (DG MOSFETs) and Tri-Gate MOSFETs (TGFETs). For long-channel case an electrostatic model can be developed from the solution of the 1D Poisson's equation (in the case of DG MOSFETs) and the 2D Poisson's equation in the section perpendicular to the channel (in the case of TGFETs). Allowing it to be incorporated in quasi-2D compact models. For short-channel devices a model can be derived from a 2D (in the case of DG MOSFETs) or a 3D (in the case of TGFETs) electrostatic analysis. The models were successfully compared with 2D and 3D TCAD simulations and, in some cases, experimental measurements. Short-channel effects, such as subthrehold slope degradation, threshold voltage roll-off and DIBL were accurately reproduced.