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Harness is an experimental metacomputing framework based on dynamic reconfigurability and extensible distributed virtual machines. The Harness system seeks to achieve two important goals. First, by enabling reconfiguration of the facilities provided by the virtual machine, Harness is able to provide specialized services appropriate to the platform and adapt to new technological developments. Second, Harness is able to adapt to application needs by configuring the required support services and programming environments on demand. In this paper, we describe the architecture and key features of Harness, and discuss the emulation of two distinct programming environments, namely Javaspaces and PVM, within the Harness environment.

The increasing complexity of available infrastructures with specific features (caches, hyperthreading, dual core, etc.) or with complex architectures (hierarchical, parallel, distributed, etc.) makes it extremely difficult to build analytical models that allow for a satisfying prediction. Hence, it raises the question on how to validate algorithms if a realistic analytic analysis is not possible any longer. As for some many other sciences, the one answer is experimental validation. Nevertheless, experimentation in Computer Science is a difficult subject that today still opens more questions than it solves: What may an experiment validate? What is a "good experiment"? How to build an experimental environment that allows for "good experiments"? etc. In this paper we will provide some hints on this subject and show how some tools can help in performing "good experiments", mainly in the context of parallel and distributed computing. More precisely we will focus on four main experimental methodologies, namely in-situ (real-scale) experiments (with an emphasis on PlanetLab and Grid'5000), Emulation (with an emphasis on Wrekavoc) benchmarking and simulation (with an emphasis on SimGRID and GridSim). We will provide a comparison of these tools and methodologies from a quantitative but also qualitative point of view.

We present an embedding of the mesh of d-ary trees, a graph we introduce here, into de Bruijn graphs, which are good topologies for parallel architectures, with an optimal expansion and constant dilation and congestion. We show how to embed several disjoint meshes of d-ary trees in the same de Bruijn graph. It gives some results about emulation of the meshes of d-ary trees by the de Bruijn network.

We prove that the hypercube and cube-connected cycles (CCC) networks can be viewed as chordal rings with periodic connection patterns and show how the period, chord length, and network size are related in each case. It is well-known that CCC is a subgraph of the hypercube; i.e., it can be derived by pruning the latter. We formulate a more general pruning strategy that leads to a spectrum of useful networks ranging from the hypercube at one end to CCC and CCC-like structures at the other. The resulting unified view of a large class of networks with varying cost and performance parameters leads to better understanding of the networks, facilitates comparisons, explicates the available cost/performance/reliability tradeoffs, and allows the construction of portable parametrized algorithms that can run on each instance of the general architecture at optimal speed.

The direct binary hypercube interconnection network has been very popular for the design of parallel computers, because it provides a low diameter and can emulate efficiently the majority of the topologies frequently employed in the development of algorithms. The last fifteen years have seen major efforts to develop image analysis algorithms for hypercube-based parallel computers. The results of these efforts have culminated in a large number of publications included in prestigious scholarly journals and conference proceedings. Nevertheless, the aforementioned powerful properties of the hypercube come at the cost of high VLSI complexity due to the increase in the number of communication ports and channels per PE (processing element) with an increase in the total number of PE’s. The high VLSI complexity of hypercube systems is undoubtedly their dominant drawback; it results in the construction of systems that contain either a large number of primitive PE’s or a small number of powerful PE’s. Therefore, low-dimensional k-ary n-cubes with lower VSLI complexity have recently drawn the attention of many designers of parallel computers. Alternative solutions reduce the hypercube’s VLSI complexity without jeopardizing its performance. Such an effort by Ziavras has resulted in the introduction of reduced hypercubes (RH’s). Taking advantage of existing high-performance routing techniques, such as wormhole routing, an RH is obtained by a uniform reduction in the number of edges for each hypercube node. An RH can also be viewed as several connected copies of the well-known cube-connected-cycles network. The objective here is to prove that parallel computers comprising RH interconnection networks are definitely good choices for all levels of image analysis. Since the exact requirements of high-level image analysis are difficult to identify, but it is believed that versatile interconnection networks, such as the hypercube, are suitable for relevant tasks, we investigate the problem of emulating hypercubes on RH’s. The ring (or linear array), the torus (or mesh), and the binary tree are the most frequently used topologies for the development of algorithms in low-level and intermediate-level image analysis. Thus, to prove the viability of the RH for the two lower levels of image analysis, we introduce techniques for embedding the aforementioned three topologies into RH’s. The results prove the suitability of RH’s for all levels of image analysis.

One of the most powerful tools in the hacker's reverse engineering arsenal is the virtual machine. These systems provide a simple mechanism for executing code in an environment in which the program can be carefully monitored and controlled, allowing attackers to subvert copy protection and access trade secrets. One of the challenges for anti-reverse engineering tools is how to protect software within such an untrustworthy environment. From the perspective of a running program, detecting an emulated environment is not trivial: the attacker can emulate the result of different operations with arbitrarily high fidelity. This paper demonstrates a mechanism that is able to detect even carefully constructed virtual environments by focusing on the stochastic variation of system call timings. A statistical technique for detecting emulated environments is presented, which uses a model of normal system call behavior to successfully identify two commonly used virtual environments under realistic conditions.

Prevailing theory suggests that firms that effectively protect technological discoveries from emulation will create and capture value. Despite its importance, little research has examined the specific mechanisms of how to protect technological discoveries, and have heretofore emphasized the importance of inherent resource attributes to limit competitor emulation. Using a sample of financial patents, we test theory regarding the effects of resource attributes and deployment mechanisms on resource-based emulation. Results indicate both resource attributes and deployment affect competitor action. However, the timing of emulation often depends upon contextual factors. Thus, resource deployment actions are critical to erecting sustainable resource barriers.

We introduce the notion of emulation that accounts for the effect of another participant's goals on the probability of success of an individual in the context of a sporting contest. The individual not only chooses her effort to maximize utility, but also reacts to the goals set by her own coach and the coach of another individual. We analyse the game of goal setting between two coaches. Beginning with identically able athletes, as one athlete's ability increases, both athletes' set goals are increased but the more able one's increases faster at first. At some critical point the coach of the less able athlete shifts to a mixed strategy that pins the other coach to a single pure strategy.

Two major challenges in modern cosmology involve understanding the origin and growth of Cosmic structure and the progenitors of Gravitational Waves. Both scenarios currently require heavy computational resources to perform simulations and inference. In this work, we adopt simple Machine Learning methods to alleviate these requirements, to enable significantly faster sampling and inference. We show that using Dimensionality Reduction and simple Supervised Learning methods, it is possible to generate high-precision emulations of density fields given a set of parameters (such as the Dark Matter density parameter and redshift). Our method provides orders of magnitude improvement of CPU run times and much less computational resources when compared with N-Body simulations or more complex supervised learning approaches. We also show that it is possible to generate fast inference of gravitational wave parameters (such as the Chirp Mass) from Binary Black Hole systems using the same method. This method provides a promising approach to fast emulation and parameter inference to further explore in the context of upcoming large surveys like Euclid, LSST/Rubin, and LISA.

The paper mainly discusses the response time of the magnetrheological fluid damper. Emulate and analyze the response time of the magnetrheological fluid and the response time of the apparatus. And build the model of Smith Precompensation of the MRFD hysteresis system to compensate the time lag.

The direct binary hypercube interconnection network has been very popular for the design of parallel computers, because it provides a low diameter and can emulate efficiently the majority of the topologies frequently employed in the development of algorithms. The last fifteen years have seen major efforts to develop image analysis algorithms for hypercube-based parallel computers. The results of these efforts have culminated in a large number of publications included in prestigious scholarly journals and conference proceedings. Nevertheless, the aforementioned powerful properties of the hypercube come at the cost of high VLSI complexity due to the increase in the number of communication ports and channels per PE (processing element) with an increase in the total number of PE's. The high VLSI complexity of hypercube systems is undoubtedly their dominant drawback; it results in the construction of systems that contain either a large number of primitive PE's or a small number of powerful PE's. Therefore, low-dimensional k-ary n-cubes with lower VSLI complexity have recently drawn the attention of many designers of parallel computers. Alternative solutions reduce the hypercube's VLSI complexity without jeopardizing its performance. Such an effort by Ziavras has resulted in the introduction of reduced hypercubes (RH's). Taking advantage of existing high-performance routing techniques, such as wormhole routing, an RH is obtained by a uniform reduction in the number of edges for each hypercube node. An RH can also be viewed as several connected copies of the well-known cube-connected-cycles network. The objective here is to prove that parallel computers comprising RH interconnection networks are definitely good choices for all levels of image analysis. Since the exact requirements of high-level image analysis are difficult to identify, but it is believed that versatile interconnection networks, such as the hypercube, are suitable for relevant tasks, we investigate the problem of emulating hypercubes on RH's. The ring (or linear array), the torus (or mesh), and the binary tree are the most frequently used topologies for the development of algorithms in low-level and intermediate-level image analysis. Thus, to prove the viability of the RH for the two lower levels of image analysis, we introduce techniques for embedding the aforementioned three topologies into RH's. The results prove the suitability of RH's for all levels of image analysis.