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Most image processing applications are naturally imprecise and can tolerate computational error up to a specific limit. In such applications, savings in power are achieved by pruning the data path units, such as an adder module. Truncation, however, may lead to errors in computing, and therefore, it is always a challenge between the amount of error that can be tolerated in an application and savings achieved in area, power and delay. This paper proposes a segmented approximate adder to reduce the computation complexity in error-resilient image processing applications. The sub-carry generator aids in achieving a faster design while carry speculation method employed improves the accuracy. Synthesis results indicate a reduced die-area up to 36.6%, improvement in delay up to 62.9%, and reduction in power consumption up to 34.1% compared to similar work published previously. Finally, the proposed adder is evaluated by using image smoothing and sharpening techniques. Simulations carried out on these applications prove that the proposed adder obtains better peak signal-to-noise ratio than those available in the literature.

Addition and multiplication are some of the most broadly adopted arithmetic operations in a wide range of applications. This paper proposes new structures of approximate multipliers to optimize the area, delay, and power without affecting the accuracy metrics. Multipliers and adders play a significant role in the functioning of any digital circuit or system. The overall performance of a processor highly depends on the speed of adders and the energy consumption. In this paper, two types of compact error-tolerant approximate adders are designed and used along with approximate 4:2 compressors to improvise the efficiency of the approximate multipliers. The proposed approximate multipliers show good results when compared to the existing structures in terms of area, delay, power, and accuracy. The approximate multipliers are applied to image sharpening and image multiplication applications. The error-tolerant adder’s performance is evaluated in the practical domain using the image blending application. Peak signal-to-noise ratio (PSNR) performance and the structural similarity index metric (SSIM) are used to assess the modeled designs. The proposed approximate multipliers and adders exhibit better performance in terms of PSNR and SSIM and are found to be an optimized design to apply effectively in various error-tolerant image processing applications.

Image sharpening based on the partial differential equations plays an important role in the fields of image processing. It is an effective technique to clear and sharpen image features, and provides a higher resolution for the subsequent processing. This paper makes the first attempt to employ the Hausdorff derivative Laplacian operator to sharpen the images. In terms of the visual quality of details, contours and edges, the original images and noisy images were sharpened by using an appropriate Hausdorff derivative order. Numerical results indicate that the Hausdorff derivative Laplacian operator outperforms the high-pass filtering, the Roberts operator and the traditional integer-order Laplacian operator. In comparison with the existing methods for the image sharpening, the proposed new methodology could be considered as a competitive alternative.