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In traditional phased-array T/R modules, front-end modules such as limiter, low-noise amplifier (LNA) and RF switch are generally implemented by independent devices, with low integration and high cost. This paper realizes the integration of all receiver functional modules in the 0.13$\mu$m CMOS SOI process, including RF switch, LNA with limiter, 6-bit digital controlled attenuator and phase shifter, and drive amplifier. The LNA integrates a limiting function, which can suffer 2W continuous wave. Fast charge–discharge circuit is applied to the low insertion loss RF switch, which greatly reduces the switching time. The phase shifter adopts a double balanced switch used for 180^∘ phase shift, which significantly reduces the phase error. The measured channel gain is about 28dB with an NF about 2.3dB and an IP1 dB above $-$14dBm. The state error of attenuator is less than $+∕-0.6$dB with step error less than $+∕-0.3$dB. The RMS phase error of phase shifter is less than 1.8 degrees. The fully integrated transceiver IC occupies an area of $5\times 5.6$mm². This receiver draws only 128mA with a 3.3V power supply.

A compact high-order scheme has been successfully proposed and verified in this paper. In this scheme, the traditional gradient reconstruction was replaced with a compact scheme. There were no needs to modify the process and algorithms of unstructured FVM including boundary conditions, flux technique, limiter functions and so on. Both memory and computation loads with the new scheme were not increased than the traditional one. Additionally, we modified Venkatakrishnan limiter to suppress numerical oscillation. The proposed compact scheme and modified Venkatakrishnan limiter have been verified with numerical experiments on benchmark problems. Numerical results showed good agreement with those obtained by other methods.