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This paper reviews causes of and trends in MOS transistor mismatch, and assesses the implications for analog circuit design in the nanometer régime. The current understanding of MOS transistor mismatch is reviewed. In most cases, transistor mismatch is dominated by threshold voltage mismatch. Although, there is strong evidence that V_T matching is improving as CMOS technology evolves, these improvements are countered by reductions in power supply that also accompany process scaling. In fact, the power consumption of analog circuits based on current design styles will increase with scaling to finer processes. It has long been known that thermal noise causes the power consumption of analog circuits to increase with scaling. However, unlike the case with thermal noise, new circuit techniques can break the accuracy-power constraints related to mismatch. These techniques are based on analog circuit redundancy, and take advantage of the tremendous transistor density offered by nanometer CMOS. This paper is primarily concerned with comparators, and in particular, with the use of comparators in flash ADCs; however, the analysis is also applicable to other circuits and applications.

We develop an infinite-horizon dynamic search model to understand education–job mismatches in the labor markets where job seekers face three different types of labor markets based on their minimum educational requirements. Using a new dataset, we find that our model matches the US data well when we introduce heterogeneity through wage distributions. We use counterfactual experiments to show that even when the general unemployment level is kept constant, if the conditions within different job market types change, overeducation levels may increase or decrease dramatically. We find that regardless of the general unemployment level, frictions in the job market is the main reason for overeducation. However when unemployment is high, highly educated job seekers may settle for jobs below their education level at a higher level leading to a high degree of overeducation in the labor market and crowding out job seekers who have lower level of education.

Mismatch and parasitic effects of bridge capacitors in successive-approximation-register analog-to-digital converter’s (SAR-ADC) split capacitor digital-to-analog conversion (DAC) cause a significant performance deterioration. This paper presents a nonlinearity analysis based on an analytical model, and a modified calibration method utilizing a pre-bias bridge capacitor is accordingly proposed. The proposed method, which uses three-segment split capacitor DAC structure, can effectively eliminate over-calibration error caused by conventional structure. To verify the technique, a 14-bit SAR-ADC has been designed in 0.35-$\mu$m 2P4M CMOS process with the PIP capacitor, and the simulation results show the method can further improve ADC performance.

Purpose: To assess the misfit in body–chair dimensions with regard to the occurrence of musculoskeletal pain among undergraduates. Methods: Selected undergraduate students of School of Allied Health Sciences University of Ghana, participated in this study. The popliteal height, buttock-popliteal length and the hip breadth of the students were measured in sitting using retractable tape measure. The corresponding seat height, seat depth and seat width of three fixed-style lecture hall chairs were similarly measured and the average scores were determined. Mismatch or fit in body–chair dimension were calculated through a standard rule. The associated musculoskeletal pain as reported by the participants was assessed using numerical rating scale. Data were analyzed with percentage, mean, standard deviation and Krukas–Wallis test at p < 0.05. Results: A total of 126 students with mean age 22 ± 01 years were recruited. The mean popliteal height, buttock-popliteal length and hip breadth of the students were 40.8(4.5), 46.8(4.6) and 35.3(3.3) cm, respectively while the corresponding average chair dimensions for seat height, seat depth and seat width were 52.0, 51.0 and 53.0 cm, respectively. Appreciable number of the students mismatched the lecture hall chair at the three levels of study. About 114 (90.5%) of the students attributed their pain to the study chairs in which 40 (31.7%) and 38 (30.2%) were in their fourth and second years of study, respectively. Lower back pain was the most prevalent (38.6%) among the sampled students. Conclusion: The large proportion of the incompatibility indicated that the school chairs were not designed based on anthropometric dimensions, thus giving insight into the source of the pain.

Pressure piping is the most productive way for large-volume compressed natural gas (CNG) transportation. In pipeline constructions, the thickness at the point where two pipes join together is often not consistent due to the mismatch in dimensions, and thus stress concentrations can often occur at the pipe joints, causing safety concerns. Therefore, it is important to accurately analyze the key influencing factors of dimensional mismatch defects, providing a theoretical basis for the preliminary design and post-repair of pipelines. This work uses the smoothed finite element method (S-FEM) that has been proven accurate in stress analysis compared with the traditional FEM. Since geometry and load of the pressure piping are axisymmetric, a novel axisymmetric S-FEM element is first developed, coded and integrated in ABAQUS using the User-defined Element Library (UEL). Intensive studies are then carried out to examine the effects of different levels of mismatch in the thicknesses of two joined pipes and the effects of the radius of the transitional fillet used to bridge the mismatches. It is found that the maximum hoop stress reduces as the radius of the transitional fillet increases. For the thinner section of the pipe, the maximum hoop stress is only affected by the thickness mismatch.

This paper reviews causes of and trends in MOS transistor mismatch, and assesses the implications for analog circuit design in the nanometer régime. The current understanding of MOS transistor mismatch is reviewed. In most cases, transistor mismatch is dominated by threshold voltage mismatch. Although, there is strong evidence that V_T matching is improving as CMOS technology evolves, these improvements are countered by reductions in power supply that also accompany process scaling. In fact, the power consumption of analog circuits based on current design styles will increase with scaling to finer processes. It has long been known that thermal noise causes the power consumption of analog circuits to increase with scaling. However, unlike the case with thermal noise, new circuit techniques can break the accuracy-power constraints related to mismatch. These techniques are based on analog circuit redundancy, and take advantage of the tremendous transistor density offered by nanometer CMOS. This paper is primarily concerned with comparators, and in particular, with the use of comparators in flash ADCs; however, the analysis is also applicable to other circuits and applications.

For Global Navigation Satellite System (GNSS), adaptive beamforming techniques are critical to interference and multipath mitigation in various applications. The major problems with existing beamforming architectures are their Initial Measurement Unit (IMU) dependence and need for gain/phase calibration. In this paper, we proposed an optimal blind beamforming architecture that could achieve the maximum output signal-to-interference-plus-noise ratio (SINR) in the presence of gain/phase mismatch. The effectiveness of the proposed architecture is verified by theory analysis and simulation results.

‘Burst’ fracture of alumina and zirconia femoral component in hip is a phenomenon, which has been assumed to occur due to the tensile hoop stresses within the femoral head. The aim of this study was to determine the effect of material properties and taper design on the stresses developed in the ceramic femoral head using finite element analysis [FEA]. An axisymmetric 3D finite element model of a 22mm diameter femoral head and taper was generated in PATRAN and analysed using ABAQUS. The common 8/10 (10mm) and a Zimmer 6° (11.5mm) tapers were modelled. To represent manufacturing tolerances the taper contact was varied by introducing angular mismatch of ±4 minutes. The 3^rd Principal stresses (hoop) were marginally higher with a CoCrMo taper compared to a Ti6A14V taper. Taper mismatch had a significant impact on the femoral head stresses. A smaller taper (10mm) with an acuter angle almost doubled the 3^rd principal stresses. Material properties and geometry is found to effect the hoop stresses generated in the femoral head. Increased rigidity led to higher stress at the taper interface. Although the stresses calculated were below the failure criteria of the materials, in mismatched tapers the induced stresses under certain geometric conditions can possibly reach to relatively critical levels.