ACHIEVING ANALOG ACCURACY IN NANOMETER CMOS

References

• P. Kinget and M. Steyaert, Impact of transistor mismatch on the speed-accuracy-power trade-off of analog CMOS circuits, Custom Integrated Circuits Conference (1996) pp. 333–336. Google Scholar
• M. Chen, J. Ho and T. Huang, IEEE J. SSC 31(2), 259 (1996). Web of Science, Google Scholar
• F. Forti and M. Wright, IEEE J. SSC 29(2), 138 (1994). Web of Science, Google Scholar
• J. Bastoset al., IEEE Transactions on Semiconductor Manufacturing 10(2), 209 (1997). Web of Science, Google Scholar
• H. Tuinhout and M. Vertregt, IEEE Transactions on Semiconductor Manufacturing 14(4), 302 (2001). Web of Science, Google Scholar
• S. Lee and D. J. Allstot, Techniques for fast electro-thermal simulation of ICs, IEEE International Solid-State Circuits Conference36 pp. 120–121. Google Scholar
• M. J. M. Pelgrom, C. J. Duinmaijer and A. P. G. Welbers, IEEE J. Solid State Circuits 1433 (1989). Google Scholar
• J. Shyu, F. Krummenacher and G. C. Temes, IEEE Journal of Solid-State Circuits 19, 948 (1984). Web of Science, Google Scholar
• K. Uyttenhove and M. S. J. Steyaert, IEEE Transaction of Circuits and Systems-II 280 (2002). Google Scholar
• Process Integration, Devices, and Structure, International Technology Roadmap for Semiconductors (2003) (www.itrs.org) . Google Scholar
• P. Kinget and M. Steyaert, Impact of transistor mismatch on the speed-accuracy-power trade-off of analog CMOS circuits, Custom Integrated Circuits Conference (1996) pp. 333–336. Google Scholar
• A. Horiet al., A 0.05μm-CMOS with ultra shallow source/drain junctions fabricated by 5keV ion implantation and rapid thermal annealing, International Electron Device Meeting (1994) pp. 485–488. Google Scholar
• P. A. Stolk and D. B. M. Klaassen, The effect of statistical dopant fluctuations on MOS device performance, International Electron Devices Meeting (1997) pp. 627–630. Google Scholar
• M. J. M. Pelgrom, H. P. Tuinhout and M. Vertregt, Transistor matching in analog CMOS applications, International Electron Device Meeting (1998) pp. 915–918. Google Scholar
• H.   Tuinhout , Impact of parametric mismatch and fluctuations on performance and yield of deep-submicron CMOS technologies , 32th European Solid-State Device Research Conference ( 2002 ) . Google Scholar
• M. J. Pelgromet al., IEEE J. SSC 29, 879 (1994). Web of Science, Google Scholar
• G. M. Yin, F. O. Eynde and W. Sansen, IEEE J. Solid-State Circuits 208 (1992). Google Scholar
• R. Poujoiset al., Low-Level MOS transistor amplifier using storage techniques, IEEE International Solid-State Circuits Conference (1973) pp. 152–153. Google Scholar
• D. A. Hodges, P. R. Gray and R. W. Brodersen, IEEE J. Solid-State Circuits 285 (1978). Google Scholar
• D. J. Allstot, IEEE J. Solid-State Circuits 1080 (1982). Google Scholar
• B. Razavi and B. A. Wooley, IEEE J. Solid-State Circuits 1916 (1992). Google Scholar
• H. Panet al., IEEE Journal of Solid-State Circuits 35, 1769 (2000). Web of Science, Google Scholar
• K. Kattmann and J. Barrow, A technique for reducing differential non-linearity errors in flash A/D converters, IEEE International Solid-State Circuits Conference34 pp. 170–171. Google Scholar
• H. Pan and A. A. Abidi, IEEE Transactions on Circuits and Systems II 50(8), (2003). Google Scholar
• Y. Tamba and K. Yamakido, A CMOS 6-b 500Msample/s ADC for hard disk drive read channel, IEEE International Solid-State Circuits Conference (1999) pp. 324–325. Google Scholar
• M. P. Flynn, C. Donovan and L. Sattler, IEEE Transactions on Circuits and Systems-II 205 (2003). Web of Science, Google Scholar
• C. Donovan and M. P. Flynn, IEEE J. Solid-State Circuits 432 (2002). Google Scholar