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We present results of some novel AlGaN/GaN heterojunction field-effect transistors (HFETs) specifically developed for RF front-end and power applications. To reduce the parasitic resistance, two unique techniques: selective Si doping into contact area and a superlattice (SL) cap structure, are developed. With the selective Si doping method, a transistor with an on-state resistance as low as 1.86 Ω·mm and a Tx/Rx switch IC with very low insertion loss (0.26 dB) and very high power handling capability (P1dB over 40 dBm) were obtained. With the SL cap HFETs, an ultra low source resistance of 0.4 Ω·mm was achieved and excellent DC and RF performances were demonstrated. The typical characteristics of these HFETs are: maximum transconductance of over 400 mS/mm, maximum drain current of 1.2 A/mm, cut-off frequency of 60 GHz, maximum oscillation frequency of 140 GHz, and a very low noise figure of 0.7 dB with 15 dB gain at 12 GHz. For power applications, in order to significantly reduce fabrication cost, we fabricated the AlGaN/GaN HFET on a conductive Si substrate with a source-via grounding (SVG) structure. The device has a very low on-state sheet resistance of 1.9 mΩ·cm², a high off-state breakdown voltage of 350 V, and a current handling capability of 150 A. In addition, a sub-nano second switching response with t_r of 98 ps and t_f of 96 ps with a current density as high as 2.0 kA/cm² is demonstrated for the first time.

The influence of pump direction in all-optical gain-clamped fiber Raman amplifier using the directional couplers in feedback loop is demonstrated. The isolator direction decided the lasing direction in feedback loop. The comparison of performance in two lasing directions for both schemes is shown. It is concluded that the forward pumping configuration with forward lasing has better gain clamping performance and noise performance.

In this paper, a CMOS active down-conversion mixer is presented for wideband applications. Specifically, a LO generation chain is suggested to convert AC LO signal to shaped trapezoid burst, which reduces the sinusoidal LO power level requirement by the mixer. The current-reuse technique by stacked nMOS/pMOS architecture is used to save the power consumption of the circuit. Moreover, this complementary configuration is also employed to compensate second-order nonlinearity of the circuit. Implemented in a 0.18-$\mu$m CMOS process, post-simulations show that, driven by only −10 dBm sinusoidal LO signal, the proposed inductorless mixer provides a maximal conversion gain of 15.7 dB and a noise figure (NF) of 9.1–12 dB across RF input frequency range 0.5–1.6 GHz. The IIP3 and IP1dB of 3.5 dBm and −4.8 dBm are obtained, respectively. The mixer core only consumes 3.6 mW from a 1.8-V supply.

Low noise amplifier (LNA) is an important component in RF receiver front end. An inductively degenerated cascode low noise amplifier (IDCLNA) is mostly preferred for producing good trade-offs such as high gain, low noise figure (NF), high reverse isolation and low power consumption for narrowband applications. This IDCLNA structure is also used to reduce the gate induced noise on the noise performance by inserting the capacitance in parallel with the gate-to-source capacitance of main transistor. Usually, the parasitic overlap capacitances can impose serious constraints on achievable performance and is taken into account in IDCLNA. In this paper, IDCLNA is designed at a frequency of 2.4 GHz with analyzing the impact of parasitic overlap capacitances on IDCLNA in terms of unity current gain frequency (f_T) which will affect the NF of IDCLNA and simulated using 130 nm, 90 nm and 65 nm CMOS technologies. The NF of IDCLNA with and without parasitic overlap capacitances are analyzed and compared for different short channel CMOS processes. Simulation results show that the parasitic overlap capacitances have advantageous to reduce the gate induced noise in IDCLNA for 130-nm CMOS process for 2.4 GHz applications.

To obtain certain information such as metabolic concentrations in neural or muscular tissues and other applications, it is necessary to design nuclear magnetic resonance (NMR) transmitters/receivers capable of operating at multiple frequencies, while maintaining a good performance at each frequencies. We have proposed a new NMR receiver front-end for simultaneous detection of proton and carbon nucleus. The system consists of two reception coils for carbon and hydrogen analysis, a multiband low-noise amplifier (LNA) for increasing the voltage level and a network for passive amplification, noise figure minimization and decreasing mutuality effect between two coils. The proposed coil set was designed, simulated and analyzed and also the signal to noise ratio (SNR) with quality factor have been calculated for it by simulation. The LNA has been designed in a 0.18$\mu$m CMOS technology and its gains for carbon and proton NMR signals are 45 and 48dB, respectively. The input referred noise for both signals is lower than 0.4nV/sqrt(Hz) and the power consumption is 4 mA from a single 1.8V supply.

In this paper, an evolutionary computation-based optimal design of low power, high gain inductive source degenerated CMOS cascode low noise amplifier (LNA) circuit is presented for 2.4GHz frequency. The main challenge for the design of radio frequency (RF) LNAs at nanometer range is the thermal noise generated in the short-channel MOSFETs. The short-channel effects (SCEs), such as velocity saturation and channel-length modulation, are considered for the design of CMOS LNA. The evolutionary algorithm taken for this work is Moth-Flame Optimization (MFO) algorithm. MFO is utilized for the optimization of noise figure (NF) while satisfying all the other design performance parameters like gain, matching parameters at input/output, power dissipation, linearity, stability. Optimal values of the sizes of the transistors and other design parameters in designing the LNA circuit are also obtained from the MFO algorithm. The CMOS LNA circuit is designed by using MFO-based optimal design parameters in CADENCE software with a standard 0.18$\mu$m CMOS process. The designed LNA shows a gain of 15.28dB, NF of 0.376dB, the power dissipation of 936$\mu$W and IIP3 of $-4.36$dBm at 2.4GHz. The designed LNA achieves better trade-off which results in an FOM of 42.3mW${}^{-1}$ and may be useful in the receiver module of IEEE 802.15.4 for WLAN applications.

This paper presents an inductor less wideband low noise amplifier (LNA) with an area of 0.3mm², using 130nm SiGe BiCMOS technology targeted for 5G WiGig wireless application. A $g_m$ boosting amplifier used at the intermediate node of the cascode topology to reduce the noise contribution of the common base (CB) transistor for the first time in SiGe HBT technology. Mathematical analysis shows that the proposed high frequency $g_m$ boosting technique on the CB transistor can be optimally tuned for either low NF or high linearity. Furthermore, the circuit incorporates variable capacitors for multimode capability, ensuring optimal performance in all four WiGig channels. Post layout EM simulation of the circuit shows that the resultant LNA has a maximum gain of 21.08dB with the $-$3 dB frequency over 56GHz to 67.3GHz. The proposed LNA exhibits a minimum noise figure of 4.3dB and shows high linearity with an input referred $IP3$ of $-$2.7dB. The designed when operated using supply voltage of 1.2V consumes a total dc power of 8.9mW.

An oscillator is a vital component as the energy source in microwave telecommunication system. Microwave oscillators designed using Gunn diode have poor DC to RF efficiency. IMPact Ionization Avalanche Transit-Time diode (IMPATT) oscillators have the drawback of poor noise performance. The transistorized oscillators have a limitation to the maximum oscillation frequency which means that they cannot be used for oscillators designed for high frequencies. To design negative series feedback Dielectric Resonator Oscillator (DRO), the resonant unit uses a dielectric resonator (DR) since it is small in size, light in weight, has high-Quality ($Q$) factor, better stability and also it is inexpensive. It has the benefits of low-phase noise, low cost, miniaturization, high stability, applicable for devices designed at high frequencies and had already been widely applied, so the research on microwave dielectric oscillator has also been one of the focus of today’s microwave integrated circuits. DRO is widely used in electronic warfare, missile, radar and communication systems. The DRO incorporates High-Electron Mobility Transistor (HEMT) as an active device since it offers higher power-added efficiency combined with excellent low-noise figures and performance. The entire circuit of DRO using HEMT at 26GHz is designed using Agilent Advanced Design System (ADS) software. In this, DRO different measurements of parameters are done such as output power which is typically $+11$dBm for 26GHz DRO, phase noise at 10kHz offset for 26GHz DRO it is 80dBc/Hz. The frequency pushing and frequency pulling for 26GHz DRO its typical values are 30kHz/V and 1MHz, respectively.

This work illustrates the design of the cell-based variable-gain amplifier (VGA) with less power consumption and improved noise margin. The variable gain amplifier is incorporated into the current wireless front-end modules. The body-bias technique in the n channel MOSFET (n-MOS) devices greatly aided in the power reduction of the cells. The device characteristics were fine-tuned to get better gain and bandwidth and reduced the supply voltage. This technique ultimately reduced the number of cell stages required to meet the expectation. The reduction of the supply voltage and the technology upscaling helped to improve the noise margin. The presented unit cell achieved accurate dB-linear characteristics across a wide tuning range, based on a unique gain control method with a combination of sub-threshold n-MOS and saturation n-MOS transistors as active loads. A 7-cell reconfigurable VGA is simulated in 0.18-$\mu$m Complementary MOSFET technology to verify the concept. The simulation results showed that the bandwidth of the VGA is greater than 2.5GHz, while less than 0.78mW is consumed from a 1.5-V supply. A noise figure of 23.7dB is measured. Also, the VGA achieves a gain control range of 19dB with a gain error less than $\pm 0.5$dB or 26.3%. These results make the designed amplifier adequate for high-frequency applications.

Experimental studies on low frequency noise in bipolar junction transistors (BJT) including polysilicon emitter, hetero-junction bipolar transistors (HBTs) and silicon-germanium hetero-junction transistors (SiGe HBTs) are reviewed. The 1/f noise is treated in terms of mobility fluctuations. The validity of a new empirical relation between the 1/f noise corner frequency f_c (the frequency where the 1/f noise and shot noise are equal) and the peak cutoff frequency fr_peak is investigated. The experimental procedure to investigate the most dominant low-frequency noise source in the equivalent circuit is described. At medium frequencies, the white noise becomes dominant and the noise figure is calculated taking into account the emitter and base series resistance.

In this work, hydrodynamic device simulations and a post-processor for the simulation of noise in MOSFETs are applied in order to evaluate the impact of scaling on the thermal noise of transistors representative of technologies with minimum gate length scaled from 0.25 μm down to 0.1 μm. The dependences on bias and technology scaling of the spectral densities of the equivalent drain- and induced gate-noise currents are anayzed in details. The effect of technology scaling on the two-port noise parameters of the intrinsic MOSFET is studied as well. The results of this work confirm that the transistor's noise performance tend to improve as the technology is scaled down, making CMOS a suitable technological option for the implementation of advanced low-power RF systems.

A simplified analytical expression for calculating noise figure of HEMT gate mixers is presented based on superposition method. The contributions of each noise source have been presented. The non-linear behavior of the transistor expressed by the transconductance profile is used to evaluate the noise figure versus LO power. This study is applied to a HEMT gate mixer, tested at 28.5 GHz radio frequency and 4 GHz intermediate frequency. The predicted and the measured noise figures are in good agreement.

Based on Boltzmann transport equation, the drift-diffusion, hydrodynamic, and Monte-Carlo physical simulators are accurately developed. For each simulator, the model equations are self-consistently solved with Poisson equation, and with Schrödinger equation when quantization effects take place, in one and two-dimensions to characterize the operation and optimize the structure of mm-wave devices. The effects of the device dimensions, biasing conditions, and operating frequencies on the accuracy of results obtained from the simulators are thoroughly investigated. Based on physical understanding of the models, the simulation results are analyzed to fully determine the limits at which a certain device simulator can be accurately and efficiently used to characterize the noise behavior of mm-wave devices.

This chapter focuses on applying surrogate models in a low noise amplifier (LNA), which is one of the main building blocks of modern communication circuits. In microelectronics, surrogate modeling has been shown to yield promising results to describe complex design surfaces. Using this feature, surrogate models can be established to extract specific design insights that enable the development of integrated circuits with higher performance and reliability. Examples of surrogate modeling in LNAs covered here explore the relationships between the voltage gain, noise figure, as well as input and output reflection coefficients. In particular, the variability of the voltage gain has been characterized through a surrogate model. Input parameters are composed of the gate, source, and drain inductors, along with their quality factors. Results confirm that highly accurate surrogate models for performance metrics such as voltage gain if an LNA can be built and employed in circuit design optimization.

We present results of some novel AlGaN/GaN heterojunction field-effect transistors (HFETs) specifically developed for RF front-end and power applications. To reduce the parasitic resistance, two unique techniques: selective Si doping into contact area and a superlattice (SL) cap structure, are developed. With the selective Si doping method, a transistor with an on-state resistance as low as 1.86 Ω·mm and a Tx/Rx switch IC with very low insertion loss (0.26 dB) and very high power handling capability (P1dB over 40 dBm) were obtained. With the SL cap HFETs, an ultra low source resistance of 0.4 Ω·mm was achieved and excellent DC and RF performances were demonstrated. The typical characteristics of these HFETs are: maximum transconductance of over 400 mS/mm, maximum drain current of 1.2 A/mm, cut-off frequency of 60 GHz, maximum oscillation frequency of 140 GHz, and a very low noise figure of 0.7 dB with 15 dB gain at 12 GHz. For power applications, in order to significantly reduce fabrication cost, we fabricated the AlGaN/GaN HFET on a conductive Si substrate with a source-via grounding (SVG) structure. The device has a very low on-state sheet resistance of 1.9 mΩ·cm², a high off-state breakdown voltage of 350 V, and a current handling capability of 150 A. In addition, a sub-nano second switching response with t_r of 98 ps and t_f of 96 ps with a current density as high as 2.0 kA/cm² is demonstrated for the first time.

Having long been the realm of molecular chemistry, astronomy, and plasma diagnostics, the upper millimeter-wave band (∼100 to 300 GHz) and the THz region above it have recently become the subject of heightened activity in the engineering community because of exciting new technology (e.g., sub-picosecond optoelectronics) and promising new “terrestrial” applications (e.g., counter-terrorism and medical imaging). The most challenging of these applications are arguably those that demand remote sensing at a stand-off of roughly 10 m or more between the target and the sensor system. As in any other spectral region, remote sensing in the THz region brings up the complex issues of sensor modality and architecture, free-space electromagnetic effects and components, transmit and receive electronics, signal processing, and atmospheric propagation. Unlike other spectral regions, there is not much literature that addresses these issues from a conceptual or system-engineering viewpoint. So a key theme of this chapter is to review or derive the essential engineering concepts in a comprehensive fashion, starting with fundamental principles of electromagnetics, quantum mechanics, and signal processing, and building up to trade-off formulations using system-level metrics such as noiseequivalent power and receiver operating characteristics. A secondary theme is to elucidate aspects of the THz region and its incumbent technology that are unique, whether advantageous or disadvantageous, relative to other spectral regions. The end goal is to provide a useful tutorial for graduate students or practicing engineers considering the upper mm-wave or THz regions for system research or development.