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This paper considers the noise modeling of interconnections in on-chip communication. We present an approach to illustrate modeling and simulation of interconnections on chip microsystems that consist of electrical circuits connected to subsystems described by partial differential equations, which are solved independently. A model for energy dissipation in RLC mode is proposed for the switching current/voltage of such on-chip interconnections.

The Waveform Relaxation (WR) algorithm is presented in this paper to address limiting in simulating NoCs due to the large number of coupled lines.

We describe our approach to the modeling of on-chip interconnections. We present an applicative example of our approach with VHDL-AMS implementations and simulation results. This article analyzes the coupling noise, the bit error rate (BER) as well as the noise as a function of the rise/fall time of the signal source which can significantly limit the scalability of the NoCs.

This study obtains wind noise variations by experimental data and simulated results to describe meteorological and oceanic effects. The ambient noise data were measured by a vertical line array in the 2001 ASIAEX South China Sea experiment. An acoustic propagation model is used in noise modeling for calculating the sound pressure of noises at receiving sites, including the effects of ocean environmental changes, bottom interactions, and noise fluctuations at different depths. Both range-independent and range-dependent sound speed profiles are generated with in-situ water temperature data. Results show fluctuating noise levels with variations in ocean environments. But the fluctuations are small such that only weak correlation exists in the acoustic noise data and ocean data. Results also indicate that using range-independent sound speed profiles can simulate noise field in range-dependent ocean environments with nonlinear internal waves for shallow regions with flat bottoms.

In this work, a new, physically based model for the low-frequency noise is investigated by statistical simulations. The proposed model is based only on superposition of generation-recombination centers, and can predict the frequency-, current- and area-dependence of the low-frequency noise, as well as the area-dependence of the variation in the noise level. Measurements on Bipolar Junction Transistors (BJTs) are found to be in excellent agreement with the simulated results. For devices with large emitter areas A_E, the model predicts a spectral density S_In ~ 1/f. For devices with submicron A_E, S_In strongly deviates from a 1/f behavior, and several generation-recombination centers dominate the spectrum. However, the average spectrum <S_In>, calculated from several BJTs with identical A_E, has a frequency dependence ~ 1/f. The extracted areal trap density within the frequency range 1-10⁴ Hz is n_T = 3 × 10⁹cm^-2. The simulations show that the condition for observing g-r noise in the spectrum, strongly depends on the number of traps N_T, as well as the distribution of the corresponding energy level for the traps. The relative noise level is found to vary in a non-symmetrical way around < S_In>, especially for small A_E. For A_E < 0.1 μm², the model predicts a relative variation in the noise level below <S_In>, and above <S_In>. For A_E > 0.3 μm², the variation is found to be .

Quantum noise or decoherence is a major factor impacting the performance of quantum technologies. On the qubit, an important quantum noise, often relevant in practice, is the thermal noise or generalized amplitude damping noise, describing the interaction with a thermal bath at an arbitrary temperature. A qubit thermal noise however cannot be modeled nor directly simulated with a few elementary Pauli operators, but instead requires specific operators. Our main goal here is to construct a circuit model for simulating the thermal noise from standard elementary qubit operators. Starting from a common quantum-operation model based on Kraus operators and an associated qubit-environment model, we derive a proper Stinespring dilated representation for the thermal noise. This dilated unitary model is then decomposed in terms of simple elementary qubit operators, and converted into a circuit based on elementary quantum gates. We arrive at our targeted simulator circuit for the thermal noise, coming with built-in easy control on the noise parameters. The noise simulator is then physically implemented and tested on an IBM-Q quantum processor. The simulator represents a useful addition to existing libraries of quantum circuits for quantum processors, and it offers a new tool for investigating quantum signal and information processing having to cope with thermal noise.