We present a metaheuristic-based attack against the traceability of an ultra-lightweight authentication protocol for RFID environments called SLMAP, and analyze its implications. The main interest of our approach is that it constitutes a complete black-box technique that does not make any assumptions on the components of the underlying protocol and can thus be easily generalized to analyze many other proposals.
With the development of inkjet-/3D-/4D-printing additive manufacturing technologies, flexible 3D substrate with complex structures can be patterned with dielectric, conductive and semi-conductive materials to realize novel RF designs. This paper provides a review of state-of-the-art additively manufactured passive RF devices including antennas and frequency selective surfaces (FSS), couplers, where origami-inspired structure enables unprecedented capabilities of on-demand continuous frequency tunability and deployability. This paper also discusses additively manufactured active RF modules and systems such as inkjet printed RF energy harvester system with high sensitivity and efficiency for Internet of Things (IoT), smart cities and wireless sensor networks (WSN) applications, inkjet-printed RF front ends, and inkjet-printed mm-wave backscatter modules.
The rapid development and deployment of 5G/mm-Wave technologies for communication, sensing and energy harvesting applications have been on the rise. Consequently, the need for low-cost, scalable, agile and compact RF modules has become more prominent than ever. This paper presents a review of recent efforts in utilizing additive manufacturing techniques such as inkjet printing to sustainably accelerate the massive deployment of 5G/mm-Wave. First, a novel flexible and massively scalable multiple-input, multiple-output (MIMO) tile-based phased array enabled by additively manufactured microstrip-to-microstrip transitions is presented. Next, a novel Rotman-Based harmonic mmID tag for Ultra-Long-Range localization is presented. Finally, low-power, low-cost mm-Wave backscattering modules for localization and orientation sensing are demonstrated.
This review encompasses additive manufacturing techniques for crafting 5G electronics, showcasing how these methods innovate device creation with novel examples. A wearable phased array device on commonplace 3D printed material is described, with integrated microfluidic cooling channels used for thermal regulation of integrated circuit bulk components. Mechanical and electrical tunability are exemplified in an origami-inspired phased array structure. A 3D printed IoT cube structure shows the flexibility in the number of geometries additively manufactured 5G devices can adhere to. Finally, integrating 3D optical lenses with 5G electronics is shown.
Security is a concept which people recognize as important, yet regularly ignore for reasons such as cost or design constraints. The world is quickly shifting towards the wireless with phenomena akin to the Internet of Thing (IoT) accelerating this progression. Technologies like Bluetooth Low Energy and Radio Frequency Identification are greatly entwined with this trend, and research has been made into reinforcing protection methods. However, security is a choice made by the designer and more often than not is given decreased priority. With the improved creativity and sophistication of malicious exploits this is becoming far less acceptable. Theft of data is trivial for a user with the correct skillset and will be successful without proper defences. Further research needs to be done in the field, and encouraging consistent security practices is an appropriate start.
This paper focuses on the impact of radio-frequency identification (RFID) technology adoption on supply chain coordination. We consider a three-tier supply chain consisting of one supplier, one transporter and one retailer with centralized and decentralized decision-making. Considering the factors of RFID tag cost and product freshness, two scenarios — with RFID and without RFID — are analyzed. In the decentralized supply chain, a revenue-sharing contract is established to explore each partner’s decisions on ordering quantity, wholesale price and profits. The results show that (1) the tag cost of RFID has different effects on the pricing decisions, ordering quantity and profit of an FPSC, and if the amount of transportation time compression increases, the range of the tag cost’s boundary value will be wider when adopting RFID technology; (2) when the members of an FPSC choose the optimal wholesale price, optimal initial fare and appropriate revenue-sharing coefficient, the FPSC can achieve a win–win result; and (3) the amount of transportation time compression has a positive correlation with the expected profit of the supplier, transporter and retailer but has a negative correlation with loss of the product.
In RFID systems, many anti-collision algorithms, driven by the concept of rescheduling the response sequence between the reader and unidentified tags, have been put forward to solve tag collision problem, including ALOHA-based, tree-based and hybrid algorithms. In this paper, we propose a novel RFID anti-collision algorithm called EAQ-CBB, which adopts three main approaches: tag population estimation based on collided bit detection method, optimal partitions and trimmed query tree based on the strategy of collided block bit-mapping (QTCBB). The relatively accurate estimation of tag backlog and optimal partition ensure a great reduction of collisions in the initial phase. For each collided partition, a QTCBB process is introduced immediately, which eliminates all the empty slots and significantly reduces the collided slots. Simulation results show that EAQ-CBB performs good stability and scalability when the key parameters change. Compared with the existing algorithms, such as DFSA, QTI, T-GDFSA and CT, EAQ-CBB outperforms the others with high system throughput, low normalized latency and low normalized overhead at a low cost of energy, which makes it easier to be used widely in the efficient-aware and energy-aware applications.
In this paper, we design and implement an integrated circuit system for contactless interface transmission to conform the transfer protocol of ISO/IEC 14443-2 Type B. The system consists of two major parts, interrogator and transponder, for magnetic power and data transmission. The power and data can synchronously be transferred from the interrogator to the transponder with 10% amplitude shift keying modulation of mixing both carrier 13.56 MHz and data rate 106 Kbps. Another data can be backward to the interrogator from the transponder with the mixed binary phase shift keying modulation. Simulation results to the whole chip based on TSMC 0.35 μm CMOS process have approved using HSPICE.
A UHF-band RFID system handling many RF tags has some advantages over a bar code system such as simultaneous multi-reading and long read range. Especially, it has been strongly desired by the logistics and the retail industries for efficiency of operation. Recently, user-friendly RFID systems are being studied. We focused on a gate system using RFID technologies. If the tag moving direction can be recognized at the RFID gate system, it will be very useful for the efficiency of inventory management and the checking of pilferage or shoplifting. In this paper, new methods of tag moving direction detection using the difference of passing time of two antennas without expensive external sensors is proposed and evaluated. Two methods are proposed for the specific procedure. The first one is to detect the time when the received power goes over the preset threshold. The second one is to estimate the aimed time using the maximum likelihood approach. Some experimental results of these methods are also shown and their feasibility is proved.
A fully integrated RFID reader chip targeted to operate in the frequency range of 860 MHz to 960 MHz is designed, simulated and fabricated. To reduce the chip performance degradation due to process and temperature variation, resistor and capacitor calibration is adopted. The output codes of resistor calibration are used to adjust main circuit blocks' biasing current while the output codes of capacitor calibration are used to fine tune filter bandwidth and Digital-to-analog converter (DAC) conversion accuracy. Dual-tuned magnetic coupled LC tanks are also introduced in our VCO design to improve phase noise performance and extend tuning range, so as to enhance the robustness of the proposed RFID reader system. The reader is implemented with a low cost 90 nm standard CMOS process and has a chip area of 3.1 mm by 3.3 mm. The chip is packaged with QFN48 and tested on PCB. The proposed RFID reader consumes 90 mW of power and has robust performance against temperature, voltage supply and process variation. The merits of the chip make it ideal for various application scenarios.
Security and privacy are the two major concerns of radio-frequency identification (RFID) based identification systems. Several researchers have proposed ultralightweight mutual authentication protocols (UMAPs) to ensure the security of the low cost RFID tags in recent years. However, almost all of the previously proposed protocols have some serious security flaws and are vulnerable to various security attacks (full disclosure attack, desynchronization attack, impersonation attack, etc.). Recently, a more sophisticated and robust UMAP: Robust confidentiality integrity and authentication (RCIA)1 [U. Mujahid, M. Najam-ul-Islam and M. Ali Shami, RCIA: A new ultralightweight RFID authentication protocol using recursive hash, Int. J. Distrib. Sens. Netw.2015 (2015) 642180] has been proposed. A new ultralightweight primitive, “recursive hash” has been used extensively in the protocol design which provides hamming weight unpredictability and irreversibility to ensure optimal security. In addition to security and privacy, small chip area is another design constraint which is mandatory requirement for a protocol to be considered as ultralightweight authentication protocol. Keeping in view the scenario presented above, this paper presents the efficient hardware implementation of the RCIA for EPC-C1G2 tags. Both the FPGA and ASIC implementation flows have been adopted. The FPGA design flow is primarily used to validate the functionality of the proposed hardware design whereas ASIC design (using TSMC 0.35 μm library) is used to validate the gate count. To the best of our knowledge, this is the first FPGA and ASIC implementation of any ultralightweight RFID authentication protocol. The simulation and synthesis results of the proposed optimal hardware architecture show the compatibility of the RCIA with extremely low cost RFID tags.
This paper presents an analysis of the security performance and evaluation of the hardware architecture of the redundant bit security (RBS) cryptosystem. RBS is a lightweight symmetric encryption algorithm that targets resource-constrained RFID devices. Unlike the existing cryptosystems, RBS simultaneously provides confidentiality, authentication, and integrity of the plaintext by inserting hash-generated redundant bits among the already modified plaintext data. A flexible-length hash algorithm in our optimized hardware architecture allows RBS to support different key sizes which allows flexibility in the security level. Our analysis shows the resilience of RBS against powerful and well-known attacks such as differential attacks and known-plaintext attacks. We compare the performance of the RBS cryptosystem against other distinguished ciphers developed for RFID systems. Simulation results show that RBS results in approximately 100%, 239%, and 153% higher hardware efficiencies while requiring 48%, 56%, and 59% less energy-per-bit compared to H-PRESENT, HB-2, and Grain, respectively. Such results present confirmatory evidence that RBS is a superior solution for providing security in resource-constrained systems such as RFID systems especially when authentication is a priority.
A low-cost regulator insensitive to temperature and supply voltage variations for power management units of Radio Frequency Identification (RFID) tag chips and other batteryless devices is proposed in this paper. The commonly used regulator has poor temperature rejection ratio (TRR) and poor voltage rejection ratio (VRR). By using combination resistors and long channel transistors, the bias and regulator circuits are improved over temperature variations. A power supply rejection (PSR) enhancement branch is also added to suppress the supply noise and stabilize the bias current. The regulator is designed and fabricated in the HJTC 0.25μm CMOS technology. Simulation results show that this regulator achieves 0.044mV/∘C TRR when temperature varies from −20∘C to 70∘C and 1.1mV/V VRR while the supply voltage of the regulator ranges from 4 to 12V. The PSR is nearly −100dB at DC. The area of this regulator is 0.102mm2 including the bias circuit. The measurement results meet simulation results well and this regulator is successfully applied in HF passive tag chips within voltage deviations of ±5% of 2.5V.
Internet of Things (IoTs) are becoming one of the integral parts of our lives, as all of the modern devices including pervasive systems use internet for its connectivity with the rest of the world. The Radio Frequency IDentification (RFID) provides unique identification and nonline of sight capabilities, therefore plays a very important role in development of IoTs. However, the RFID systems incorporate wireless channel for communication, therefore have some allied risks to the system from threat agents. In order to prevent the system from malicious activities in a cost effective way, numerous Ultralightweight Mutual Authentication Protocols (UMAPs) have been proposed since last decade. These UMAPs mainly involve simple bitwise logical operators such as XOR, AND, OR, etc., in their designs and can be implemented with extremely low cost RFID tags. However, most of the UMAP designers didn’t provide the proper hardware approximations of their UMAPs and presented only theoretical results which mostly mislead the reader. In this paper, we have addressed this problem by reporting our experiences with FPGA and ASIC-based implementation of UMAP named psuedo Kasami code-based Mutual Authentication Protocol (KMAP+). Further, we have also improved the structure of the KMAP protocol to overcome the previously highlighted attack model. The hardware implementation results show that KMAP+ successfully conform to EPC-C1G2 tags and can be implemented using less than 4K GE (for 32-bit word length).
Wireless sensing techniques for Human Activity Recognition (HAR) have been widely studied in recent years. At present, research on HAR based on Radio Frequency Identification (RFID) is changing from the tag attachment method to the tag non-attachment method. Affected by multipath, the current solutions in tag non-attachment scenarios mainly focus on single-object activity recognition, which is not suitable for multi-object scenarios. To address these issues, we propose STMultiple, a novel tag non-attachment activity recognition model for multi-object. The model first preprocesses the raw signal with filter and phase calibration, then it applies dilated convolution in the frequency domain to extract multi-object activity features, finally the feature pyramid structure and ProbSparse are used to optimize the vanilla Transformer-Encoder to enhance the activity recognition ability. Extensive experiments show that STMultiple can achieve recognition accuracy of up to 97.93% and down to about 90% in challenging environments ranging from two to five users, which has excellent performance compared to several state-of-the-art methods.
Passive RFID has the advantages of rapid identification of multi-target objects and low implementation cost. It is the most critical technology in the Industrial Internet of Things information-gathering layer and is extensively applied in various industries, such as smart production, asset management, and monitoring. The signal collision caused by the communication between the reader/writer and tags sharing the same wireless channel has caused a series of problems, such as the reduction of the identification efficiency of the reader/writer and the increment of the missed reading rate, thus restricting the further development of RFID. At present, many hybrid anti-collision algorithms integrate the advantages of Aloha and TS algorithms to optimize RFID system performance, but these solutions also suffer from performance bottlenecks. In order to break through such performance bottleneck, based on the ISE-BS algorithm, we combined the sub-frame observation mechanism and the Q value adjustment strategy and proposed two hybrid anti-collision algorithms. The experimental results show that the two algorithms proposed in this paper have obvious advantages in system throughput, time efficiency and other metrics, surpassing existing UHF RFID anti-collision algorithms.
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Radio Frequency IDentification (RFID) technology has been in use for several decades to track and identify goods, assets, and even living things. Recently, however, RFID has generated widespread corporate interest as a means to waste management performance. In this paper, a vehicle routing model for waste collection is developed. The model not only uses precise data with respect to both quantity and location via RFID technology, but also includes single vehicle with a pre-determined capacity, multiple tours, and locations with deterministic waste quantities. Then a numerical example is solved via Dash Optimization XPress Solver to find an optimal route considering the locations of waste bins and the waste quantities. The impact of changing waste quantity on the operation cost is investigated considering the distance of the waste bins using variance analysis (ANOVA). With this method, municipality authorities can better manage itineraries and manpower, and have a monitoring system for the volume of the waste produced in the region of their responsibility.
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