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    A CMOS LNA Partially Degenerated Topology Proposal Using Active Inductors

    This paper presents the design of a CMOS low-noise amplifier (LNA) with partial inductive degeneration using active inductors in 0.35μm technology. Both, the inductor of the partial degeneration and the load inductor, are actives. The inductors configurations are cascode with feedback resistance and Wu folded compact. The LNA has a gain of 13.2dB and a noise figure of 4.7dB at 1.8GHz. The layout has an active area of 0.17mm2. The results are satisfactory, validating the compact design and demonstrating the technical feasibility of this proposed topology.